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* [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718
@ 2016-12-02  5:52 Baoyou Xie
  2016-12-02  5:58 ` Baoyou Xie
  2016-12-05  2:48 ` Shawn Guo
  0 siblings, 2 replies; 5+ messages in thread
From: Baoyou Xie @ 2016-12-02  5:52 UTC (permalink / raw)
  To: robh+dt, mark.rutland, catalin.marinas, will.deacon, shawnguo,
	jun.nie
  Cc: devicetree, linux-arm-kernel, linux-kernel, baoyou.xie,
	xie.baoyou, chen.chaokai, wang.qiang01

This patch adds the CPU clock phandle in CPU's node
and uses operating-points-v2 to register operating points.

So it can be used by cpufreq-dt driver.

Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
---
 arch/arm64/boot/dts/zte/zx296718.dtsi | 39 +++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi
index 7a1aed7..b44d1d1 100644
--- a/arch/arm64/boot/dts/zte/zx296718.dtsi
+++ b/arch/arm64/boot/dts/zte/zx296718.dtsi
@@ -44,6 +44,7 @@
 #include <dt-bindings/input/input.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/clock/zx296718-clock.h>
 
 / {
 	compatible = "zte,zx296718";
@@ -81,6 +82,8 @@
 			compatible = "arm,cortex-a53","arm,armv8";
 			reg = <0x0 0x0>;
 			enable-method = "psci";
+			clocks = <&topcrm A53_GATE>;
+			operating-points-v2 = <&cluster0_opp>;
 		};
 
 		cpu1: cpu@1 {
@@ -88,6 +91,8 @@
 			compatible = "arm,cortex-a53","arm,armv8";
 			reg = <0x0 0x1>;
 			enable-method = "psci";
+			clocks = <&topcrm A53_GATE>;
+			operating-points-v2 = <&cluster0_opp>;
 		};
 
 		cpu2: cpu@2 {
@@ -95,6 +100,8 @@
 			compatible = "arm,cortex-a53","arm,armv8";
 			reg = <0x0 0x2>;
 			enable-method = "psci";
+			clocks = <&topcrm A53_GATE>;
+			operating-points-v2 = <&cluster0_opp>;
 		};
 
 		cpu3: cpu@3 {
@@ -102,6 +109,38 @@
 			compatible = "arm,cortex-a53","arm,armv8";
 			reg = <0x0 0x3>;
 			enable-method = "psci";
+			clocks = <&topcrm A53_GATE>;
+			operating-points-v2 = <&cluster0_opp>;
+		};
+	};
+
+	cluster0_opp: opp-table0 {
+		compatible = "operating-points-v2";
+		opp-shared;
+
+		opp@500000000 {
+			opp-hz = /bits/ 64 <500000000>;
+			clock-latency-ns = <500000>;
+		};
+
+		opp@648000000 {
+			opp-hz = /bits/ 64 <648000000>;
+			clock-latency-ns = <500000>;
+		};
+
+		opp@800000000 {
+			opp-hz = /bits/ 64 <800000000>;
+			clock-latency-ns = <500000>;
+		};
+
+		opp@1000000000 {
+			opp-hz = /bits/ 64 <1000000000>;
+			clock-latency-ns = <500000>;
+		};
+
+		opp@1188000000 {
+			opp-hz = /bits/ 64 <1188000000>;
+			clock-latency-ns = <500000>;
 		};
 	};
 
-- 
2.7.4

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718
  2016-12-02  5:52 [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718 Baoyou Xie
@ 2016-12-02  5:58 ` Baoyou Xie
  2016-12-02  6:00   ` Viresh Kumar
  2016-12-05  2:48 ` Shawn Guo
  1 sibling, 1 reply; 5+ messages in thread
From: Baoyou Xie @ 2016-12-02  5:58 UTC (permalink / raw)
  To: Rob Herring, mark.rutland, catalin.marinas, Will Deacon,
	Shawn Guo, Jun Nie, Viresh Kumar
  Cc: devicetree, linux-arm-kernel, Linux Kernel Mailing List,
	Baoyou Xie, xie.baoyou, chen.chaokai, wang.qiang01

[-- Attachment #1: Type: text/plain, Size: 3356 bytes --]

+ Viresh, the author of the bindings.

On 2 December 2016 at 13:52, Baoyou Xie <baoyou.xie@linaro.org> wrote:

> This patch adds the CPU clock phandle in CPU's node
> and uses operating-points-v2 to register operating points.
>
> So it can be used by cpufreq-dt driver.
>
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
> ---
>  arch/arm64/boot/dts/zte/zx296718.dtsi | 39 ++++++++++++++++++++++++++++++
> +++++
>  1 file changed, 39 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi
> b/arch/arm64/boot/dts/zte/zx296718.dtsi
> index 7a1aed7..b44d1d1 100644
> --- a/arch/arm64/boot/dts/zte/zx296718.dtsi
> +++ b/arch/arm64/boot/dts/zte/zx296718.dtsi
> @@ -44,6 +44,7 @@
>  #include <dt-bindings/input/input.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/clock/zx296718-clock.h>
>
>  / {
>         compatible = "zte,zx296718";
> @@ -81,6 +82,8 @@
>                         compatible = "arm,cortex-a53","arm,armv8";
>                         reg = <0x0 0x0>;
>                         enable-method = "psci";
> +                       clocks = <&topcrm A53_GATE>;
> +                       operating-points-v2 = <&cluster0_opp>;
>                 };
>
>                 cpu1: cpu@1 {
> @@ -88,6 +91,8 @@
>                         compatible = "arm,cortex-a53","arm,armv8";
>                         reg = <0x0 0x1>;
>                         enable-method = "psci";
> +                       clocks = <&topcrm A53_GATE>;
> +                       operating-points-v2 = <&cluster0_opp>;
>                 };
>
>                 cpu2: cpu@2 {
> @@ -95,6 +100,8 @@
>                         compatible = "arm,cortex-a53","arm,armv8";
>                         reg = <0x0 0x2>;
>                         enable-method = "psci";
> +                       clocks = <&topcrm A53_GATE>;
> +                       operating-points-v2 = <&cluster0_opp>;
>                 };
>
>                 cpu3: cpu@3 {
> @@ -102,6 +109,38 @@
>                         compatible = "arm,cortex-a53","arm,armv8";
>                         reg = <0x0 0x3>;
>                         enable-method = "psci";
> +                       clocks = <&topcrm A53_GATE>;
> +                       operating-points-v2 = <&cluster0_opp>;
> +               };
> +       };
> +
> +       cluster0_opp: opp-table0 {
> +               compatible = "operating-points-v2";
> +               opp-shared;
> +
> +               opp@500000000 {
> +                       opp-hz = /bits/ 64 <500000000>;
> +                       clock-latency-ns = <500000>;
> +               };
> +
> +               opp@648000000 {
> +                       opp-hz = /bits/ 64 <648000000>;
> +                       clock-latency-ns = <500000>;
> +               };
> +
> +               opp@800000000 {
> +                       opp-hz = /bits/ 64 <800000000>;
> +                       clock-latency-ns = <500000>;
> +               };
> +
> +               opp@1000000000 {
> +                       opp-hz = /bits/ 64 <1000000000>;
> +                       clock-latency-ns = <500000>;
> +               };
> +
> +               opp@1188000000 {
> +                       opp-hz = /bits/ 64 <1188000000>;
> +                       clock-latency-ns = <500000>;
>                 };
>         };
>
> --
> 2.7.4
>
>

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^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718
  2016-12-02  5:58 ` Baoyou Xie
@ 2016-12-02  6:00   ` Viresh Kumar
  2016-12-05  2:35     ` Jun Nie
  0 siblings, 1 reply; 5+ messages in thread
From: Viresh Kumar @ 2016-12-02  6:00 UTC (permalink / raw)
  To: Baoyou Xie
  Cc: mark.rutland, devicetree, catalin.marinas, xie.baoyou,
	Will Deacon, Linux Kernel Mailing List, Rob Herring, chen.chaokai,
	wang.qiang01, Jun Nie, Shawn Guo, linux-arm-kernel

On 02-12-16, 13:58, Baoyou Xie wrote:
> + Viresh, the author of the bindings.
> 
> On 2 December 2016 at 13:52, Baoyou Xie <baoyou.xie@linaro.org> wrote:
> 
> > This patch adds the CPU clock phandle in CPU's node
> > and uses operating-points-v2 to register operating points.
> >
> > So it can be used by cpufreq-dt driver.
> >
> > Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
> > ---
> >  arch/arm64/boot/dts/zte/zx296718.dtsi | 39 ++++++++++++++++++++++++++++++
> > +++++
> >  1 file changed, 39 insertions(+)

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

-- 
viresh

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718
  2016-12-02  6:00   ` Viresh Kumar
@ 2016-12-05  2:35     ` Jun Nie
  0 siblings, 0 replies; 5+ messages in thread
From: Jun Nie @ 2016-12-05  2:35 UTC (permalink / raw)
  To: Viresh Kumar
  Cc: mark.rutland, devicetree, catalin.marinas, xie.baoyou,
	Will Deacon, Linux Kernel Mailing List, Rob Herring, chen.chaokai,
	wang.qiang01, Baoyou Xie, Shawn Guo, linux-arm-kernel

2016-12-02 14:00 GMT+08:00 Viresh Kumar <viresh.kumar@linaro.org>:
> On 02-12-16, 13:58, Baoyou Xie wrote:
>> + Viresh, the author of the bindings.
>>
>> On 2 December 2016 at 13:52, Baoyou Xie <baoyou.xie@linaro.org> wrote:
>>
>> > This patch adds the CPU clock phandle in CPU's node
>> > and uses operating-points-v2 to register operating points.
>> >
>> > So it can be used by cpufreq-dt driver.
>> >
>> > Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
>> > ---
>> >  arch/arm64/boot/dts/zte/zx296718.dtsi | 39 ++++++++++++++++++++++++++++++
>> > +++++
>> >  1 file changed, 39 insertions(+)

Reviewed-by: Jun Nie <jun.nie@linaro.org>

>
> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
>
> --
> viresh

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718
  2016-12-02  5:52 [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718 Baoyou Xie
  2016-12-02  5:58 ` Baoyou Xie
@ 2016-12-05  2:48 ` Shawn Guo
  1 sibling, 0 replies; 5+ messages in thread
From: Shawn Guo @ 2016-12-05  2:48 UTC (permalink / raw)
  To: Baoyou Xie
  Cc: robh+dt, mark.rutland, catalin.marinas, will.deacon, jun.nie,
	devicetree, linux-arm-kernel, linux-kernel, xie.baoyou,
	chen.chaokai, wang.qiang01

On Fri, Dec 02, 2016 at 01:52:36PM +0800, Baoyou Xie wrote:
> This patch adds the CPU clock phandle in CPU's node
> and uses operating-points-v2 to register operating points.
> 
> So it can be used by cpufreq-dt driver.
> 
> Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>

Applied, thanks.

^ permalink raw reply	[flat|nested] 5+ messages in thread

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2016-12-02  5:52 [PATCH v2] arm64: dts: zx: support cpu-freq for zx296718 Baoyou Xie
2016-12-02  5:58 ` Baoyou Xie
2016-12-02  6:00   ` Viresh Kumar
2016-12-05  2:35     ` Jun Nie
2016-12-05  2:48 ` Shawn Guo

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