From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v3 -next 1/2] ARM: sunxi: add support for H2+ SoC Date: Mon, 5 Dec 2016 10:19:55 +0100 Message-ID: <20161205091955.zkffyktw5trfocnx@lukather> References: <20161202150513.34691-1-icenowy@aosc.xyz> Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="6k6lhcaqrt3fm2zp" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20161202150513.34691-1-icenowy-ymACFijhrKM@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Icenowy Zheng Cc: Chen-Yu Tsai , Rob Herring , Russell King , Andre Przywara , Hans de Goede , Arnd Bergmann , Vishnu Patekar , linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org --6k6lhcaqrt3fm2zp Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline On Fri, Dec 02, 2016 at 11:05:12PM +0800, Icenowy Zheng wrote: > Allwinner H2+ is a quad-core Cortex-A7 SoC. > > It is very like H3, that they share the same SoC ID (0x1680), and H3 > memory maps as well as drivers works well on the SoC. > > Signed-off-by: Icenowy Zheng Fixed the alphabetical order in the bindings doc, and applied. Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com --6k6lhcaqrt3fm2zp--