From mboxrd@z Thu Jan 1 00:00:00 1970 From: Lee Jones Subject: Re: [PATCH v6 1/8] MFD: add bindings for STM32 Timers driver Date: Mon, 12 Dec 2016 07:46:54 +0000 Message-ID: <20161212074654.GO3625@dell.home> References: <1481292919-26587-1-git-send-email-benjamin.gaignard@st.com> <1481292919-26587-2-git-send-email-benjamin.gaignard@st.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Return-path: Content-Disposition: inline In-Reply-To: <1481292919-26587-2-git-send-email-benjamin.gaignard-qxv4g6HH51o@public.gmane.org> Sender: linux-iio-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Benjamin Gaignard Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, mark.rutland-5wv7dgnIgG8@public.gmane.org, alexandre.torgue-qxv4g6HH51o@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, jic23-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, knaack.h-Mmb7MZpHnFY@public.gmane.org, lars-Qo5EllUWu/uELgA04lAiVw@public.gmane.org, pmeerw-jW+XmwGofnusTnJN9+BGXg@public.gmane.org, linux-iio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, fabrice.gasnier-qxv4g6HH51o@public.gmane.org, gerald.baeza-qxv4g6HH51o@public.gmane.org, arnaud.pouliquen-qxv4g6HH51o@public.gmane.org, linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, linaro-kernel-cunTk1MwBs8s++Sfvej+rw@public.gmane.org, Benjamin Gaignard List-Id: devicetree@vger.kernel.org On Fri, 09 Dec 2016, Benjamin Gaignard wrote: > Add bindings information for STM32 Timers > > version 6: > - rename stm32-gtimer to stm32-timers > - change compatible > - add description about the IPs > > version 2: > - rename stm32-mfd-timer to stm32-gptimer > - only keep one compatible string > > Signed-off-by: Benjamin Gaignard > --- > .../devicetree/bindings/mfd/stm32-timers.txt | 46 ++++++++++++++++++++++ > 1 file changed, 46 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt For my own reference: Acked-for-MFD-by: Lee Jones > diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt > new file mode 100644 > index 0000000..b30868e > --- /dev/null > +++ b/Documentation/devicetree/bindings/mfd/stm32-timers.txt > @@ -0,0 +1,46 @@ > +STM32 Timers driver bindings > + > +This IP provides 3 types of timer along with PWM functionality: > +- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable > + prescaler, break input feature, PWM outputs and complementary PWM ouputs channels. > +- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a > + programmable prescaler and PWM outputs. > +- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler. > + > +Required parameters: > +- compatible: must be "st,stm32-timers" > + > +- reg: Physical base address and length of the controller's > + registers. > +- clock-names: Set to "clk_int". > +- clocks: Phandle to the clock used by the timer module. > + For Clk properties, please refer to ../clock/clock-bindings.txt > + > +Optional parameters: > +- resets: Phandle to the parent reset controller. > + See ../reset/st,stm32-rcc.txt > + > +Optional subnodes: > +- pwm: See ../pwm/pwm-stm32.txt > +- timer: See ../iio/timer/stm32-timer-trigger.txt > + > +Example: > + timers@40010000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "st,stm32-timers"; > + reg = <0x40010000 0x400>; > + clocks = <&rcc 0 160>; > + clock-names = "clk_int"; > + > + pwm { > + compatible = "st,stm32-pwm"; > + pinctrl-0 = <&pwm1_pins>; > + pinctrl-names = "default"; > + }; > + > + timer { > + compatible = "st,stm32-timer-trigger"; > + reg = <0>; > + }; > + }; -- Lee Jones Linaro STMicroelectronics Landing Team Lead Linaro.org │ Open source software for ARM SoCs Follow Linaro: Facebook | Twitter | Blog