From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Benjamin Gaignard
<benjamin.gaignard-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: lee.jones-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
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thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
linux-pwm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
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Benjamin Gaignard
<benjamin.gaignard-qxv4g6HH51o@public.gmane.org>
Subject: Re: [PATCH v6 7/8] ARM: dts: stm32: add Timers driver for stm32f429 MCU
Date: Mon, 12 Dec 2016 12:59:43 -0600 [thread overview]
Message-ID: <20161212185943.ph7njaqb2lxtgdn4@rob-hp-laptop> (raw)
In-Reply-To: <1481292919-26587-8-git-send-email-benjamin.gaignard-qxv4g6HH51o@public.gmane.org>
On Fri, Dec 09, 2016 at 03:15:18PM +0100, Benjamin Gaignard wrote:
> Add Timers and it sub-nodes into DT for stm32f429 family.
>
> version 6:
> - split patch in two: one for SoC family and one for stm32f469
> discovery board.
>
> version 5:
> - rename gptimer node to timers
> - re-order timers node par addresses
>
> version 4:
> - remove unwanted indexing in pwm@ and timer@ node name
> - use "reg" instead of additional parameters to set timer
> configuration
>
> version 3:
> - use "st,stm32-timer-trigger" in DT
>
> version 2:
> - use parameters to describe hardware capabilities
> - do not use references for pwm and iio timer subnodes
>
> Signed-off-by: Benjamin Gaignard <benjamin.gaignard-qxv4g6HH51o@public.gmane.org>
> ---
> arch/arm/boot/dts/stm32f429.dtsi | 275 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 275 insertions(+)
>
> diff --git a/arch/arm/boot/dts/stm32f429.dtsi b/arch/arm/boot/dts/stm32f429.dtsi
> index bca491d..d0fb9cc 100644
> --- a/arch/arm/boot/dts/stm32f429.dtsi
> +++ b/arch/arm/boot/dts/stm32f429.dtsi
> @@ -355,6 +355,21 @@
> slew-rate = <2>;
> };
> };
> +
> + pwm1_pins: pwm@1 {
No reg prop, so should not have a unit-address. Given the names in the
define below, seems like "timer1" would be appropriate.
> + pins {
> + pinmux = <STM32F429_PA8_FUNC_TIM1_CH1>,
> + <STM32F429_PB13_FUNC_TIM1_CH1N>,
> + <STM32F429_PB12_FUNC_TIM1_BKIN>;
> + };
> + };
> +
> + pwm3_pins: pwm@3 {
> + pins {
> + pinmux = <STM32F429_PB4_FUNC_TIM3_CH1>,
> + <STM32F429_PB5_FUNC_TIM3_CH2>;
> + };
> + };
> };
>
> rcc: rcc@40023810 {
> @@ -426,6 +441,266 @@
> interrupts = <80>;
> clocks = <&rcc 0 38>;
> };
> +
> + timers2: timers@40000000 {
timer@...
It may be more than just a timer, there's not a better generic name.
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40000000 0x400>;
> + clocks = <&rcc 0 128>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <1>;
> + status = "disabled";
> + };
> + };
> +
> + timers3: timers@40000400 {
ditto
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40000400 0x400>;
> + clocks = <&rcc 0 129>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <2>;
> + status = "disabled";
> + };
> + };
> +
> + timers4: timers@40000800 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40000800 0x400>;
> + clocks = <&rcc 0 130>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <3>;
> + status = "disabled";
> + };
> + };
> +
> + timers5: timers@40000C00 {
timer@...
And use lowercase hex.
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40000C00 0x400>;
ditto
> + clocks = <&rcc 0 131>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <4>;
> + status = "disabled";
> + };
> + };
> +
> + timers6: timers@40001000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40001000 0x400>;
> + clocks = <&rcc 0 132>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <5>;
> + status = "disabled";
> + };
> + };
> +
> + timers7: timers@40001400 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40001400 0x400>;
> + clocks = <&rcc 0 133>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <6>;
> + status = "disabled";
> + };
> + };
> +
> + timers12: timers@40001800 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40001800 0x400>;
> + clocks = <&rcc 0 134>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <9>;
> + status = "disabled";
> + };
> + };
> +
> + timers13: timers@40001C00 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40001C00 0x400>;
> + clocks = <&rcc 0 135>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> + };
> +
> + timers14: timers@40002000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40002000 0x400>;
> + clocks = <&rcc 0 136>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> + };
> +
> + timers1: timers@40010000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40010000 0x400>;
> + clocks = <&rcc 0 160>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <0>;
> + status = "disabled";
> + };
> + };
> +
> + timers8: timers@40010400 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40010400 0x400>;
> + clocks = <&rcc 0 161>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <7>;
> + status = "disabled";
> + };
> + };
> +
> + timers9: timers@40014000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40014000 0x400>;
> + clocks = <&rcc 0 176>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> +
> + timer {
> + compatible = "st,stm32-timer-trigger";
> + reg = <8>;
> + status = "disabled";
> + };
> + };
> +
> + timers10: timers@40014400 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40014400 0x400>;
> + clocks = <&rcc 0 177>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> + };
> +
> + timers11: timers@40014800 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "st,stm32-timers";
> + reg = <0x40014800 0x400>;
> + clocks = <&rcc 0 178>;
> + clock-names = "clk_int";
> + status = "disabled";
> +
> + pwm {
> + compatible = "st,stm32-pwm";
> + status = "disabled";
> + };
> + };
> };
> };
>
> --
> 1.9.1
>
next prev parent reply other threads:[~2016-12-12 18:59 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-09 14:15 [PATCH v6 0/8] Add PWM and IIO timer drivers for STM32 Benjamin Gaignard
2016-12-09 14:15 ` [PATCH v6 1/8] MFD: add bindings for STM32 Timers driver Benjamin Gaignard
[not found] ` <1481292919-26587-2-git-send-email-benjamin.gaignard-qxv4g6HH51o@public.gmane.org>
2016-12-12 7:46 ` Lee Jones
2016-12-12 18:51 ` Rob Herring
2016-12-13 9:29 ` Benjamin Gaignard
[not found] ` <CA+M3ks4ukP14YE5-6+gAzJBjEmjEyGyVbsVGOm8ehVm0EfzO-w-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-12-13 21:07 ` Rob Herring
[not found] ` <CAL_Jsq+qzhUAMG_jL6CSHz+kHu6M6N8Nko4KfRQRgRgtk-KTKg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-12-14 13:07 ` Benjamin Gaignard
2016-12-09 14:15 ` [PATCH v6 2/8] MFD: add " Benjamin Gaignard
2016-12-12 7:47 ` Lee Jones
2016-12-30 20:38 ` Jonathan Cameron
2016-12-09 14:15 ` [PATCH v6 3/8] PWM: add pwm-stm32 DT bindings Benjamin Gaignard
2016-12-12 19:02 ` Rob Herring
2016-12-13 11:11 ` Lee Jones
2016-12-13 15:57 ` Rob Herring
2016-12-13 16:28 ` Benjamin Gaignard
2016-12-13 17:11 ` Rob Herring
[not found] ` <CAL_JsqL8pJSFb8LbABAYJOQ0URaMpyupbFryk_mS2ToN1kStdA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-12-19 12:55 ` Lee Jones
[not found] ` <1481292919-26587-1-git-send-email-benjamin.gaignard-qxv4g6HH51o@public.gmane.org>
2016-12-09 14:15 ` [PATCH v6 4/8] PWM: add PWM driver for STM32 plaftorm Benjamin Gaignard
2016-12-12 7:48 ` [PATCH v6 0/8] Add PWM and IIO timer drivers for STM32 Lee Jones
2016-12-09 14:15 ` [PATCH v6 5/8] IIO: add bindings for STM32 timer trigger driver Benjamin Gaignard
2016-12-12 19:28 ` Rob Herring
2016-12-09 14:15 ` [PATCH v6 6/8] IIO: add " Benjamin Gaignard
[not found] ` <1481292919-26587-7-git-send-email-benjamin.gaignard-qxv4g6HH51o@public.gmane.org>
2016-12-30 21:12 ` Jonathan Cameron
2017-01-02 8:46 ` Benjamin Gaignard
2017-01-02 18:22 ` Jonathan Cameron
2017-01-03 9:23 ` Benjamin Gaignard
2017-01-03 12:59 ` Benjamin Gaignard
2017-01-03 17:24 ` Jonathan Cameron
2017-01-03 17:16 ` Jonathan Cameron
2016-12-09 14:15 ` [PATCH v6 7/8] ARM: dts: stm32: add Timers driver for stm32f429 MCU Benjamin Gaignard
[not found] ` <1481292919-26587-8-git-send-email-benjamin.gaignard-qxv4g6HH51o@public.gmane.org>
2016-12-12 18:59 ` Rob Herring [this message]
2016-12-13 9:15 ` Benjamin Gaignard
2016-12-13 9:29 ` Benjamin Gaignard
2016-12-09 14:15 ` [PATCH v6 8/8] ARM: dts: stm32: Enable pw1 and pwm3 for stm32f469-disco Benjamin Gaignard
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