From mboxrd@z Thu Jan 1 00:00:00 1970 From: Will Deacon Subject: Re: [PATCH v3 1/2] of: base: add support to find the level of the last cache Date: Tue, 17 Jan 2017 11:30:49 +0000 Message-ID: <20170117113048.GD27328@arm.com> References: <1484563244-14743-1-git-send-email-sudeep.holla@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <1484563244-14743-1-git-send-email-sudeep.holla@arm.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Sudeep Holla Cc: Mark Rutland , devicetree@vger.kernel.org, Catalin Marinas , linux-kernel@vger.kernel.org, Rob Herring , linux-arm-kernel@lists.infradead.org, Tan Xiaojun List-Id: devicetree@vger.kernel.org On Mon, Jan 16, 2017 at 10:40:43AM +0000, Sudeep Holla wrote: > It is useful to have helper function just to get the number of cache > levels for a given logical cpu. We can obtain the same by just checking > the level at which the last cache is present. This patch adds support > to find the level of the last cache for a given cpu. > > It will be used on ARM64 platform where the device tree provides the > information for the additional non-architected/transparent/external > last level caches that are not integrated with the processors. > > Cc: Mark Rutland > Suggested-by: Rob Herring > Acked-by: Rob Herring > Tested-by: Tan Xiaojun > Signed-off-by: Sudeep Holla > --- > drivers/of/base.c | 26 ++++++++++++++++++++++++++ > include/linux/of.h | 1 + > 2 files changed, 27 insertions(+) Thanks, I've queued these two for 4.11. Will