[PATCH v3 1/2] dt-bindings: display: Add BOE nv101wxmn51 panel binding

[PATCH v3 1/2] dt-bindings: display: Add BOE nv101wxmn51 panel binding

[Caesar Wang]

The BOE 10.1" NV101WXMN51 panel is an WXGA TFT LCD panel.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v3: None
Changes in v2: None

 .../devicetree/bindings/display/panel/boe,nv101wxmn51.txt          | 7 +++++++
 1 file changed, 7 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/display/panel/boe,nv101wxmn51.txt

diff --git a/Documentation/devicetree/bindings/display/panel/boe,nv101wxmn51.txt b/Documentation/devicetree/bindings/display/panel/boe,nv101wxmn51.txt
new file mode 100644
index 0000000..b258d6a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/boe,nv101wxmn51.txt
@@ -0,0 +1,7 @@
+BOE OPTOELECTRONICS TECHNOLOGY 10.1" WXGA TFT LCD panel
+
+Required properties:
+- compatible: should be "boe,nv101wxmn51"
+
+This binding is compatible with the simple-panel binding, which is specified
+in simple-panel.txt in this directory.
-- 
2.7.4

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[PATCH v3 2/2] drm/panel: simple: Add support BOE nv101wxmn51

[Caesar Wang]

10.1WXGA is a color active matrix TFT LCD module using amorphous silicon
TFT's as an active switching devices. It can be supported by the
simple-panel driver.

Read the panel default edid information:

EDID MODE DETAILS
                name = <NULL>
                pixel_clock = 71900
                lvds_dual_channel = 0
                refresh = 0
                ha = 1280
                hbl = 160
                hso = 48
                hspw = 32
                hborder = 0
                va = 800
                vbl = 32
                vso = 3
                vspw = 5
                vborder = 0
                phsync = +
                pvsync = -
                x_mm = 0
                y_mm = 0
drm_display_mode
                .hdisplay = 1280
                .hsync_start = 1328
                .hsync_end = 1360
                .htotal = 1440
                .vdisplay = 800
                .vsync_start = 803
                .vsync_end = 808
                .vtotal = 832

There are two modes in the edid:
Detailed mode1: Clock 71.900 MHz, 216 mm x 135 mm
               1280 1328 1360 1440 hborder 0
                800  803  808  832 vborder 0
               +hsync -vsync
Detailed mode2: Clock 57.500 MHz, 216 mm x 135 mm
               1280 1328 1360 1440 hborder 0
                800  803  808  832 vborder 0
               +hsync -vsync

Add the both edid to support more modes for BOE nv101wxmn51.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
---

Changes in v3:
- As Stéphane commented on https://patchwork.kernel.org/patch/9465911,
  add downclock mode for edid.

Changes in v2:
- fix the vsync_start and vsync_end from the edid.
- change the commit.

 drivers/gpu/drm/panel/panel-simple.c | 45 ++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index 06aaf79..1ce25b5 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -668,6 +668,48 @@ static const struct panel_desc avic_tm070ddh03 = {
 	},
 };
 
+static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
+	{
+		.clock = 71900,
+		.hdisplay = 1280,
+		.hsync_start = 1280 + 48,
+		.hsync_end = 1280 + 48 + 32,
+		.htotal = 1280 + 48 + 32 + 80,
+		.vdisplay = 800,
+		.vsync_start = 800 + 3,
+		.vsync_end = 800 + 3 + 5,
+		.vtotal = 800 + 3 + 5 + 24,
+		.vrefresh = 60,
+	},
+	{
+		.clock = 57500,
+		.hdisplay = 1280,
+		.hsync_start = 1280 + 48,
+		.hsync_end = 1280 + 48 + 32,
+		.htotal = 1280 + 48 + 32 + 80,
+		.vdisplay = 800,
+		.vsync_start = 800 + 3,
+		.vsync_end = 800 + 3 + 5,
+		.vtotal = 800 + 3 + 5 + 24,
+		.vrefresh = 48,
+	},
+};
+
+static const struct panel_desc boe_nv101wxmn51 = {
+	.modes = boe_nv101wxmn51_modes,
+	.num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
+	.bpc = 8,
+	.size = {
+		.width = 217,
+		.height = 136,
+	},
+	.delay = {
+		.prepare = 210,
+		.enable = 50,
+		.unprepare = 160,
+	},
+};
+
 static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
 	.clock = 66770,
 	.hdisplay = 800,
@@ -1748,6 +1790,9 @@ static const struct of_device_id platform_of_match[] = {
 		.compatible = "avic,tm070ddh03",
 		.data = &avic_tm070ddh03,
 	}, {
+		.compatible = "boe,nv101wxmn51",
+		.data = &boe_nv101wxmn51,
+	}, {
 		.compatible = "chunghwa,claa070wp03xg",
 		.data = &chunghwa_claa070wp03xg,
 	}, {
-- 
2.7.4

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Re: [PATCH v3 2/2] drm/panel: simple: Add support BOE nv101wxmn51

[Doug Anderson]

Hi,

On Tue, Dec 13, 2016 at 7:19 PM, Caesar Wang <wxt@rock-chips.com> wrote:
> 10.1WXGA is a color active matrix TFT LCD module using amorphous silicon
> TFT's as an active switching devices. It can be supported by the
> simple-panel driver.
>
> Read the panel default edid information:
>
> EDID MODE DETAILS
>                 name = <NULL>
>                 pixel_clock = 71900
>                 lvds_dual_channel = 0
>                 refresh = 0
>                 ha = 1280
>                 hbl = 160
>                 hso = 48
>                 hspw = 32
>                 hborder = 0
>                 va = 800
>                 vbl = 32
>                 vso = 3
>                 vspw = 5
>                 vborder = 0
>                 phsync = +
>                 pvsync = -
>                 x_mm = 0
>                 y_mm = 0
> drm_display_mode
>                 .hdisplay = 1280
>                 .hsync_start = 1328
>                 .hsync_end = 1360
>                 .htotal = 1440
>                 .vdisplay = 800
>                 .vsync_start = 803
>                 .vsync_end = 808
>                 .vtotal = 832
>
> There are two modes in the edid:
> Detailed mode1: Clock 71.900 MHz, 216 mm x 135 mm
>                1280 1328 1360 1440 hborder 0
>                 800  803  808  832 vborder 0
>                +hsync -vsync
> Detailed mode2: Clock 57.500 MHz, 216 mm x 135 mm
>                1280 1328 1360 1440 hborder 0
>                 800  803  808  832 vborder 0
>                +hsync -vsync
>
> Add the both edid to support more modes for BOE nv101wxmn51.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
> Changes in v3:
> - As Stéphane commented on https://patchwork.kernel.org/patch/9465911,
>   add downclock mode for edid.
>
> Changes in v2:
> - fix the vsync_start and vsync_end from the edid.
> - change the commit.
>
>  drivers/gpu/drm/panel/panel-simple.c | 45 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 45 insertions(+)

Seems sane to me.

Reviewed-by: Douglas Anderson <dianders@chromium.org>
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Re: [PATCH v3 2/2] drm/panel: simple: Add support BOE nv101wxmn51

[Stéphane Marchesin]

Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>


On Tue, Dec 13, 2016 at 7:19 PM, Caesar Wang <wxt@rock-chips.com> wrote:
> 10.1WXGA is a color active matrix TFT LCD module using amorphous silicon
> TFT's as an active switching devices. It can be supported by the
> simple-panel driver.
>
> Read the panel default edid information:
>
> EDID MODE DETAILS
>                 name = <NULL>
>                 pixel_clock = 71900
>                 lvds_dual_channel = 0
>                 refresh = 0
>                 ha = 1280
>                 hbl = 160
>                 hso = 48
>                 hspw = 32
>                 hborder = 0
>                 va = 800
>                 vbl = 32
>                 vso = 3
>                 vspw = 5
>                 vborder = 0
>                 phsync = +
>                 pvsync = -
>                 x_mm = 0
>                 y_mm = 0
> drm_display_mode
>                 .hdisplay = 1280
>                 .hsync_start = 1328
>                 .hsync_end = 1360
>                 .htotal = 1440
>                 .vdisplay = 800
>                 .vsync_start = 803
>                 .vsync_end = 808
>                 .vtotal = 832
>
> There are two modes in the edid:
> Detailed mode1: Clock 71.900 MHz, 216 mm x 135 mm
>                1280 1328 1360 1440 hborder 0
>                 800  803  808  832 vborder 0
>                +hsync -vsync
> Detailed mode2: Clock 57.500 MHz, 216 mm x 135 mm
>                1280 1328 1360 1440 hborder 0
>                 800  803  808  832 vborder 0
>                +hsync -vsync
>
> Add the both edid to support more modes for BOE nv101wxmn51.
>
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
>
> Changes in v3:
> - As Stéphane commented on https://patchwork.kernel.org/patch/9465911,
>   add downclock mode for edid.
>
> Changes in v2:
> - fix the vsync_start and vsync_end from the edid.
> - change the commit.
>
>  drivers/gpu/drm/panel/panel-simple.c | 45 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 45 insertions(+)
>
> diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
> index 06aaf79..1ce25b5 100644
> --- a/drivers/gpu/drm/panel/panel-simple.c
> +++ b/drivers/gpu/drm/panel/panel-simple.c
> @@ -668,6 +668,48 @@ static const struct panel_desc avic_tm070ddh03 = {
>         },
>  };
>
> +static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
> +       {
> +               .clock = 71900,
> +               .hdisplay = 1280,
> +               .hsync_start = 1280 + 48,
> +               .hsync_end = 1280 + 48 + 32,
> +               .htotal = 1280 + 48 + 32 + 80,
> +               .vdisplay = 800,
> +               .vsync_start = 800 + 3,
> +               .vsync_end = 800 + 3 + 5,
> +               .vtotal = 800 + 3 + 5 + 24,
> +               .vrefresh = 60,
> +       },
> +       {
> +               .clock = 57500,
> +               .hdisplay = 1280,
> +               .hsync_start = 1280 + 48,
> +               .hsync_end = 1280 + 48 + 32,
> +               .htotal = 1280 + 48 + 32 + 80,
> +               .vdisplay = 800,
> +               .vsync_start = 800 + 3,
> +               .vsync_end = 800 + 3 + 5,
> +               .vtotal = 800 + 3 + 5 + 24,
> +               .vrefresh = 48,
> +       },
> +};
> +
> +static const struct panel_desc boe_nv101wxmn51 = {
> +       .modes = boe_nv101wxmn51_modes,
> +       .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
> +       .bpc = 8,
> +       .size = {
> +               .width = 217,
> +               .height = 136,
> +       },
> +       .delay = {
> +               .prepare = 210,
> +               .enable = 50,
> +               .unprepare = 160,
> +       },
> +};
> +
>  static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
>         .clock = 66770,
>         .hdisplay = 800,
> @@ -1748,6 +1790,9 @@ static const struct of_device_id platform_of_match[] = {
>                 .compatible = "avic,tm070ddh03",
>                 .data = &avic_tm070ddh03,
>         }, {
> +               .compatible = "boe,nv101wxmn51",
> +               .data = &boe_nv101wxmn51,
> +       }, {
>                 .compatible = "chunghwa,claa070wp03xg",
>                 .data = &chunghwa_claa070wp03xg,
>         }, {
> --
> 2.7.4
>
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Re: [PATCH v3 2/2] drm/panel: simple: Add support BOE nv101wxmn51

[Thierry Reding]

[-- Attachment #1.1: Type: text/plain, Size: 2118 bytes --]

On Wed, Dec 14, 2016 at 11:19:56AM +0800, Caesar Wang wrote:
> 10.1WXGA is a color active matrix TFT LCD module using amorphous silicon
> TFT's as an active switching devices. It can be supported by the
> simple-panel driver.
> 
> Read the panel default edid information:
> 
> EDID MODE DETAILS
>                 name = <NULL>
>                 pixel_clock = 71900
>                 lvds_dual_channel = 0
>                 refresh = 0
>                 ha = 1280
>                 hbl = 160
>                 hso = 48
>                 hspw = 32
>                 hborder = 0
>                 va = 800
>                 vbl = 32
>                 vso = 3
>                 vspw = 5
>                 vborder = 0
>                 phsync = +
>                 pvsync = -
>                 x_mm = 0
>                 y_mm = 0
> drm_display_mode
>                 .hdisplay = 1280
>                 .hsync_start = 1328
>                 .hsync_end = 1360
>                 .htotal = 1440
>                 .vdisplay = 800
>                 .vsync_start = 803
>                 .vsync_end = 808
>                 .vtotal = 832
> 
> There are two modes in the edid:
> Detailed mode1: Clock 71.900 MHz, 216 mm x 135 mm
>                1280 1328 1360 1440 hborder 0
>                 800  803  808  832 vborder 0
>                +hsync -vsync
> Detailed mode2: Clock 57.500 MHz, 216 mm x 135 mm
>                1280 1328 1360 1440 hborder 0
>                 800  803  808  832 vborder 0
>                +hsync -vsync
> 
> Add the both edid to support more modes for BOE nv101wxmn51.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
> Changes in v3:
> - As Stéphane commented on https://patchwork.kernel.org/patch/9465911,
>   add downclock mode for edid.
> 
> Changes in v2:
> - fix the vsync_start and vsync_end from the edid.
> - change the commit.
> 
>  drivers/gpu/drm/panel/panel-simple.c | 45 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 45 insertions(+)

Applied with a slightly modified commit message.

Thanks,
Thierry

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Re: [PATCH v3 1/2] dt-bindings: display: Add BOE nv101wxmn51 panel binding

[Rob Herring]

On Wed, Dec 14, 2016 at 11:19:55AM +0800, Caesar Wang wrote:
> The BOE 10.1" NV101WXMN51 panel is an WXGA TFT LCD panel.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  .../devicetree/bindings/display/panel/boe,nv101wxmn51.txt          | 7 +++++++
>  1 file changed, 7 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/panel/boe,nv101wxmn51.txt

Acked-by: Rob Herring <robh@kernel.org>
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Re: [PATCH v3 1/2] dt-bindings: display: Add BOE nv101wxmn51 panel binding

[Thierry Reding]

[-- Attachment #1.1: Type: text/plain, Size: 480 bytes --]

On Wed, Dec 14, 2016 at 11:19:55AM +0800, Caesar Wang wrote:
> The BOE 10.1" NV101WXMN51 panel is an WXGA TFT LCD panel.
> 
> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
> ---
> 
> Changes in v3: None
> Changes in v2: None
> 
>  .../devicetree/bindings/display/panel/boe,nv101wxmn51.txt          | 7 +++++++
>  1 file changed, 7 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/panel/boe,nv101wxmn51.txt

Applied, thanks.

Thierry

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