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From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Michael Turquette
	<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	linux-clk <linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	linux-arm-kernel
	<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
	devicetree <devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	linux-kernel
	<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
	linux-sunxi <linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org>
Subject: Re: Re: [PATCH 06/11] clk: sunxi-ng: Add A80 USB CCU
Date: Fri, 27 Jan 2017 09:45:16 +0100	[thread overview]
Message-ID: <20170127084516.vnyrcvidyy26eswg@lukather> (raw)
In-Reply-To: <CAGb2v66R+NtOQ_J-kQeawppvPUUxBd1n0BXD7p8H5JA6pwYDJQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>

[-- Attachment #1: Type: text/plain, Size: 5079 bytes --]

On Thu, Jan 26, 2017 at 07:12:44PM +0800, Chen-Yu Tsai wrote:
> On Thu, Jan 26, 2017 at 6:14 PM, Maxime Ripard
> <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> > Hi,
> >
> > On Tue, Jan 24, 2017 at 10:32:25AM +0800, Chen-Yu Tsai wrote:
> >> Add support for the USB clock controls found on the A80.
> >>
> >> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
> >> ---
> >>  .../devicetree/bindings/clock/sun9i-usb.txt        |  24 ++++
> >>  drivers/clk/sunxi-ng/Makefile                      |   1 +
> >>  drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c           | 144 +++++++++++++++++++++
> >>  drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.h           |  25 ++++
> >>  include/dt-bindings/clock/sun9i-a80-usb.h          |  59 +++++++++
> >>  include/dt-bindings/reset/sun9i-a80-usb.h          |  56 ++++++++
> >>  6 files changed, 309 insertions(+)
> >>  create mode 100644 Documentation/devicetree/bindings/clock/sun9i-usb.txt
> >>  create mode 100644 drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c
> >>  create mode 100644 drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.h
> >>  create mode 100644 include/dt-bindings/clock/sun9i-a80-usb.h
> >>  create mode 100644 include/dt-bindings/reset/sun9i-a80-usb.h
> >>
> >> diff --git a/Documentation/devicetree/bindings/clock/sun9i-usb.txt b/Documentation/devicetree/bindings/clock/sun9i-usb.txt
> >> new file mode 100644
> >> index 000000000000..c2d38626eaaa
> >> --- /dev/null
> >> +++ b/Documentation/devicetree/bindings/clock/sun9i-usb.txt
> >> @@ -0,0 +1,24 @@
> >> +Allwinner A80 USB Clock Control Binding
> >> +------------------------------------
> >> +
> >> +Required properties :
> >> +- compatible: must contain one of the following compatibles:
> >> +             - "allwinner,sun9i-a80-usb-clocks"
> >> +
> >> +- reg: Must contain the registers base address and length
> >> +- clocks: phandle to the clocks feeding the USB subsystem. Two are needed:
> >> +  - "bus": the bus clock for the whole USB subsystem
> >> +  - "hosc": the high frequency oscillator (usually at 24MHz)
> >> +- clock-names: Must contain the clock names described just above
> >> +- #clock-cells : must contain 1
> >> +- #reset-cells : must contain 1
> >> +
> >> +Example:
> >> +usb_clocks: clock@00a08000 {
> >> +     compatible = "allwinner,sun9i-a80-usb-clks";
> >> +     reg = <0x00a08000 0x8>;
> >> +     clocks = <&ccu CLK_BUS_USB>, <&osc24M>;
> >> +     clock-names = "bus", "hosc";
> >> +     #clock-cells = <1>;
> >> +     #reset-cells = <1>;
> >> +};
> >> diff --git a/drivers/clk/sunxi-ng/Makefile b/drivers/clk/sunxi-ng/Makefile
> >> index 126bb7c1c3f7..8f37ef7fb67d 100644
> >> --- a/drivers/clk/sunxi-ng/Makefile
> >> +++ b/drivers/clk/sunxi-ng/Makefile
> >> @@ -26,3 +26,4 @@ obj-$(CONFIG_SUN8I_A33_CCU) += ccu-sun8i-a33.o
> >>  obj-$(CONFIG_SUN8I_H3_CCU)   += ccu-sun8i-h3.o
> >>  obj-$(CONFIG_SUN8I_V3S_CCU)  += ccu-sun8i-v3s.o
> >>  obj-$(CONFIG_SUN9I_A80_CCU)  += ccu-sun9i-a80.o
> >> +obj-$(CONFIG_SUN9I_A80_CCU)  += ccu-sun9i-a80-usb.o
> >> diff --git a/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c b/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c
> >> new file mode 100644
> >> index 000000000000..1d76f24f7df3
> >> --- /dev/null
> >> +++ b/drivers/clk/sunxi-ng/ccu-sun9i-a80-usb.c
> >> @@ -0,0 +1,144 @@
> >> +/*
> >> + * Copyright (c) 2016 Chen-Yu Tsai. All rights reserved.
> >> + *
> >> + * This software is licensed under the terms of the GNU General Public
> >> + * License version 2, as published by the Free Software Foundation, and
> >> + * may be copied, distributed, and modified under those terms.
> >> + *
> >> + * This program is distributed in the hope that it will be useful,
> >> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> >> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> >> + * GNU General Public License for more details.
> >> + */
> >> +
> >> +#include <linux/clk.h>
> >> +#include <linux/clk-provider.h>
> >> +#include <linux/of_address.h>
> >> +#include <linux/platform_device.h>
> >> +
> >> +#include "ccu_common.h"
> >> +#include "ccu_gate.h"
> >> +#include "ccu_reset.h"
> >> +
> >> +#include "ccu-sun9i-a80-usb.h"
> >> +
> >> +static SUNXI_CCU_GATE(bus_hci0_clk, "bus-hci0", "bus-usb", 0x0, BIT(1), 0);
> >> +static SUNXI_CCU_GATE(usb_ohci0_clk, "usb-ohci0", "osc24M", 0x0, BIT(2), 0);
> >> +static SUNXI_CCU_GATE(bus_hci1_clk, "bus-hci1", "bus-usb", 0x0, BIT(3), 0);
> >> +static SUNXI_CCU_GATE(bus_hci2_clk, "bus-hci2", "bus-usb", 0x0, BIT(5), 0);
> >> +static SUNXI_CCU_GATE(usb_ohci2_clk, "usb-ohci2", "osc24M", 0x0, BIT(6), 0);
> >
> > In the current !sunxi-ng driver, there's a clock at offset 4, did you
> > forget it?
> 
> It supposedly is for ohci1, but since the second USB host is HSIC
> only, and Allwinner does not even list ohci1 in its documents, it
> probably isn't there. IIRC the gate itself can be toggled. But
> there probably isn't anything connected. The old driver having
> a gate for it would be my mistake.

Ok :)

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

  parent reply	other threads:[~2017-01-27  8:45 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-24  2:32 [PATCH 00/11] clk: sunxi-ng: Add support for A80 CCUs Chen-Yu Tsai
     [not found] ` <20170124023230.3990-1-wens-jdAy2FN1RRM@public.gmane.org>
2017-01-24  2:32   ` [PATCH 01/11] clk: sunxi-ng: mux: Fix determine_rate for mux clocks with pre-dividers Chen-Yu Tsai
     [not found]     ` <20170124023230.3990-2-wens-jdAy2FN1RRM@public.gmane.org>
2017-01-26  9:55       ` Maxime Ripard
2017-01-26 11:22         ` Chen-Yu Tsai
2017-01-24  2:32   ` [PATCH 02/11] clk: sunxi-ng: mux: honor CLK_SET_RATE_NO_REPARENT flag Chen-Yu Tsai
2017-01-24  2:32   ` [PATCH 03/11] clk: sunxi-ng: mux: Get closest parent rate possible with CLK_SET_RATE_PARENT Chen-Yu Tsai
2017-01-24  2:32   ` [PATCH 04/11] clk: sunxi-ng: Support separately grouped PLL lock status register Chen-Yu Tsai
2017-01-26  9:57     ` Maxime Ripard
2017-01-24  2:32   ` [PATCH 05/11] clk: sunxi-ng: Add A80 CCU Chen-Yu Tsai
     [not found]     ` <20170124023230.3990-6-wens-jdAy2FN1RRM@public.gmane.org>
2017-01-27 21:13       ` Rob Herring
2017-01-24  2:32   ` [PATCH 06/11] clk: sunxi-ng: Add A80 USB CCU Chen-Yu Tsai
     [not found]     ` <20170124023230.3990-7-wens-jdAy2FN1RRM@public.gmane.org>
2017-01-26 10:14       ` Maxime Ripard
2017-01-26 11:12         ` [linux-sunxi] " Chen-Yu Tsai
     [not found]           ` <CAGb2v66R+NtOQ_J-kQeawppvPUUxBd1n0BXD7p8H5JA6pwYDJQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-01-27  8:45             ` Maxime Ripard [this message]
2017-01-27 21:15       ` Rob Herring
2017-01-24  2:32   ` [PATCH 07/11] clk: sunxi-ng: Add A80 Display Engine CCU Chen-Yu Tsai
2017-01-26 10:39     ` Maxime Ripard
2017-01-26 11:20       ` Chen-Yu Tsai
     [not found]         ` <CAGb2v65QLAD4C27NoRHALO=2WzW=DC6OxwCCMhes-N+kWO3_kg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-01-27  8:58           ` Maxime Ripard
2017-01-27  9:26             ` Chen-Yu Tsai
     [not found]               ` <CAGb2v671951p7-QNJh_JHXqCPJMHso8EjER-mBt1sn8j+U+uHg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-01-27  9:42                 ` Maxime Ripard
2017-01-24  2:32   ` [PATCH 08/11] ARM: dts: sun8i-a23-q8-tablet: Drop pinmux setting for codec PA gpio Chen-Yu Tsai
     [not found]     ` <20170124023230.3990-9-wens-jdAy2FN1RRM@public.gmane.org>
2017-01-26 10:38       ` Maxime Ripard
2017-01-26 11:15         ` Chen-Yu Tsai
2017-01-24  2:32   ` [PATCH 09/11] ARM: dts: sunxi: Remove no longer used pinctrl/sun4i-a10.h header Chen-Yu Tsai
     [not found]     ` <20170124023230.3990-10-wens-jdAy2FN1RRM@public.gmane.org>
2017-01-26 10:21       ` Maxime Ripard
2017-01-24  2:32   ` [PATCH 10/11] arm64: dts: allwinner: " Chen-Yu Tsai
     [not found]     ` <20170124023230.3990-11-wens-jdAy2FN1RRM@public.gmane.org>
2017-01-26 10:15       ` Maxime Ripard
2017-01-26 11:23         ` Chen-Yu Tsai
     [not found]           ` <CAGb2v66cQoPQzd6W1D8bZ5hSURfGP3icJjeoo1mNk2ccG9B2vw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-01-27  8:46             ` Maxime Ripard
2017-01-24  2:32   ` [PATCH 11/11] ARM: dts: sun9i: Switch to new clock bindings Chen-Yu Tsai
2017-01-24  6:03   ` [PATCH 00/11] clk: sunxi-ng: Add support for A80 CCUs Priit Laes

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