From: Stephen Boyd <sboyd@codeaurora.org>
To: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Mark Rutland <mark.rutland@arm.com>, Andrew Lunn <andrew@lunn.ch>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Linus Walleij <linus.walleij@linaro.org>,
Laxman Dewangan <ldewangan@nvidia.com>,
linux-clk@vger.kernel.org,
Florian Fainelli <f.fainelli@gmail.com>,
Juri Lelli <juri.lelli@arm.com>,
linux@armlinux.org.uk, Thierry Reding <treding@nvidia.com>,
Michael Turquette <mturquette@baylibre.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
devicetree@vger.kernel.org, Jason Cooper <jason@lakedaemon.net>,
Arnd Bergmann <arnd@arndb.de>,
Kalyan Kinthada <kalyan.kinthada@alliedtelesis.co.nz>,
Rob Herring <robh+dt@kernel.org>,
Chris Brand <chris.brand@broadcom.com>,
linux-arm-kernel@lists.infradead.org,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org,
Chris Packham <chris.packham@alliedtelesis.co.>
Subject: Re: [PATCHv5 0/5] Support for Marvell switches with integrated CPUs
Date: Fri, 27 Jan 2017 10:47:45 -0800 [thread overview]
Message-ID: <20170127184745.GD8801@codeaurora.org> (raw)
In-Reply-To: <87wpdgwj72.fsf@free-electrons.com>
On 01/27, Gregory CLEMENT wrote:
> Hi all,
>
> On ven., janv. 27 2017, Chris Packham <chris.packham@alliedtelesis.co.nz> wrote:
>
> > The 98DX3236, 98DX3336 and 98DX4251 are a set of switch ASICs with
> > integrated CPUs. They CPU block is common within these product lines and
> > (as far as I can tell/have been told) is based on the Armada XP. There
> > are a few differences due to the fact they have to squeeze the CPU into
> > the same package as the switch.
> >
> > I've rebased this series against linux-pinctrl/devel to get access to
> > mvebu_mmio_mpp_ctrl. Everything else still applies cleanly to
> > v4.10.0-rc5.
>
> Just to let you know that I plan to apply the 3 arm patch once Chris
> will have sent the new series with the minor fixes I asked on patch 3.
>
> I already applied them in the for-next branch to benefit of some build
> test coverage.
>
> Stephen,
>
> you gave your Acked-by on the first patch, but don't you plan to apply
> it on the clk branch?
It must have not been clear if I should apply it, hence the ack.
I'll apply it now.
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
next prev parent reply other threads:[~2017-01-27 18:47 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-27 3:25 [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Chris Packham
2017-01-27 3:25 ` [PATCHv5 1/5] clk: mvebu: support for 98DX3236 SoC Chris Packham
2017-01-27 18:48 ` Stephen Boyd
2017-01-27 3:25 ` [PATCHv5 2/5] arm: mvebu: support for SMP on 98DX3336 SoC Chris Packham
2017-01-27 14:06 ` Gregory CLEMENT
2017-01-27 3:25 ` [PATCHv5 3/5] pinctrl: mvebu: pinctrl driver for 98DX3236 SoC Chris Packham
[not found] ` <20170127032546.14657-1-chris.packham-6g8wRflRTwXFdCa3tKVlE6U/zSkkHjvu@public.gmane.org>
2017-01-27 3:25 ` [PATCHv5 4/5] arm: mvebu: Add device tree for 98DX3236 SoCs Chris Packham
2017-01-27 3:25 ` [PATCHv5 5/5] arm: mvebu: Add device tree for db-dxbc2 and db-xc3-24g4xg boards Chris Packham
2017-01-27 16:48 ` Gregory CLEMENT
2017-01-27 16:39 ` [PATCHv5 0/5] Support for Marvell switches with integrated CPUs Gregory CLEMENT
2017-01-27 16:49 ` Gregory CLEMENT
2017-01-27 18:47 ` Stephen Boyd [this message]
2017-01-29 20:30 ` Chris Packham
2017-01-30 14:40 ` Gregory CLEMENT
2017-01-30 20:27 ` Chris Packham
-- strict thread matches above, loose matches on Subject: below --
2017-01-29 23:20 Chris Packham
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