From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH 5/8] arm64: dts: allwinner: add R_PIO node Date: Wed, 8 Feb 2017 11:14:58 +0100 Message-ID: <20170208101458.du6ybqsw52ypzhzw@lukather> References: <20170208100009.29362-1-icenowy@aosc.xyz> <20170208100009.29362-5-icenowy@aosc.xyz> Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="fds4xpmbfshxzxzd" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20170208100009.29362-5-icenowy-ymACFijhrKM@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Icenowy Zheng Cc: Linus Walleij , Rob Herring , Chen-Yu Tsai , Catalin Marinas , Will Deacon , linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org --fds4xpmbfshxzxzd Content-Type: text/plain; charset=UTF-8 Content-Disposition: inline On Wed, Feb 08, 2017 at 06:00:06PM +0800, Icenowy Zheng wrote: > Allwinner A64 SoC has a R_PIO node like the one in H3. > > Add the node as well as needed clocks and resets. > > As there's no document for apb0_gates, I only added the R_PIO bit here. > > Signed-off-by: Icenowy Zheng > --- > arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 40 +++++++++++++++++++++++++++ > 1 file changed, 40 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > index 1c64ea2d23f9..4b0baa79554c 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi > @@ -98,6 +98,15 @@ > clock-output-names = "osc32k"; > }; > > + apb0: apb0_clk { > + compatible = "fixed-factor-clock"; > + #clock-cells = <0>; > + clock-div = <1>; > + clock-mult = <1>; > + clocks = <&osc24M>; > + clock-output-names = "apb0"; > + }; > + > psci { > compatible = "arm,psci-0.2"; > method = "smc"; > @@ -392,5 +401,36 @@ > interrupts = , > ; > }; > + > + apb0_gates: clk@1f01428 { > + compatible = "allwinner,sun50i-a64-apb0-gates-clk", > + "allwinner,sun4i-a10-gates-clk"; > + reg = <0x01f01428 0x4>; > + #clock-cells = <1>; > + clocks = <&apb0>; > + clock-indices = <0>; > + clock-output-names = "apb0_pio"; > + }; > + > + apb0_rst: reset@1f014b0 { > + reg = <0x01f014b0 0x4>; > + compatible = "allwinner,sun6i-a31-clock-reset"; > + #reset-cells = <1>; > + }; Please make a sunxi-ng driver for those clocks. Thanks, Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com --fds4xpmbfshxzxzd--