Re: [PATCH v2 2/2] fpga manager: Add Xilinx slave serial SPI driver

[Anatolij Gustschin <agust-ynQEQJNshbs@public.gmane.org>]

On Tue, 21 Feb 2017 19:53:40 +0100
Michal Simek michal.simek-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org wrote:
...
>There is one thing I have checked ml505 - old virtex 5 board which has
>this interface.
>http://www-inst.eecs.berkeley.edu/~cs150/fa13/resources/ml50x_schematics.pdf
>
>And I was chatting with one board guy and I think that done pin should
>be optional not required because not all boards export it.
>
>Then there is a question how to find out that programming was done and
>that's something what I don't know. But will try to find out if you can
>send any sequence over spi to find it out instead of gpio done pin.

maybe the boards without DONE pin use INIT_B pin with external pull-up
for CRC error reporting after configuration? Not sure if this is a
reliable way to ensure the configuration has completed.

Thanks,
Anatolij
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html