From: Lucas Stach <l.stach@pengutronix.de>
To: Philipp Zabel <p.zabel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, kernel@pengutronix.de,
dri-devel@lists.freedesktop.org, patchwork-lst@pengutronix.de
Subject: [PATCH v2 5/9] gpu: ipu-v3: document valid IPUv3 compatibles and extend for i.MX6 QuadPlus
Date: Wed, 8 Mar 2017 12:13:17 +0100 [thread overview]
Message-ID: <20170308111321.3035-5-l.stach@pengutronix.de> (raw)
In-Reply-To: <20170308111321.3035-1-l.stach@pengutronix.de>
Document the valid compatible strings for the IPUv3.
On i.MX6 QuadPlus the IPU needs to know which PRG has to be
used for this IPU instance. Add a "fsl,prg" property containing
a phandle pointing to the correct PRG device.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt b/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
index 62eb637630b5..fa01db7eb66c 100644
--- a/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
+++ b/Documentation/devicetree/bindings/display/imx/fsl-imx-drm.txt
@@ -21,13 +21,19 @@ Freescale i.MX IPUv3
====================
Required properties:
-- compatible: Should be "fsl,<chip>-ipu"
+- compatible: Should be "fsl,<chip>-ipu" where <chip> is one of
+ - imx51
+ - imx53
+ - imx6q
+ - imx6qp
- reg: should be register base and length as documented in the
datasheet
- interrupts: Should contain sync interrupt and error interrupt,
in this order.
- resets: phandle pointing to the system reset controller and
reset line index, see reset/fsl,imx-src.txt for details
+Additional required properties for fsl,imx6qp-ipu:
+- fsl,prg: phandle to prg node associated with this IPU instance
Optional properties:
- port@[0-3]: Port nodes with endpoint definitions as defined in
Documentation/devicetree/bindings/media/video-interfaces.txt.
--
2.11.0
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next prev parent reply other threads:[~2017-03-08 11:13 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-08 11:13 [PATCH v2 1/9] gpu: ipu-v3: add DT binding for the Prefetch Resolve Engine Lucas Stach
2017-03-08 11:13 ` [PATCH v2 2/9] gpu: ipu-v3: add driver for " Lucas Stach
2017-03-08 11:13 ` [PATCH v2 3/9] gpu: ipu-v3: add DT binding for the Prefetch Resolve Gasket Lucas Stach
2017-03-08 11:13 ` [PATCH v2 4/9] gpu: ipu-v3: add driver for " Lucas Stach
2017-03-08 11:13 ` Lucas Stach [this message]
2017-03-08 11:13 ` [PATCH v2 6/9] gpu: ipu-v3: hook up PRG unit Lucas Stach
2017-03-08 11:13 ` [PATCH v2 7/9] gpu: ipu-v3: only set non-zero AXI ID for IC when PRG is absent Lucas Stach
2017-03-08 11:13 ` [PATCH v2 8/9] drm/imx: enable/disable PRG on CRTC enable/disable Lucas Stach
2017-03-08 11:13 ` [PATCH v2 9/9] drm/imx: use PRG/PRE when possible Lucas Stach
2017-03-13 14:45 ` [PATCH v2 1/9] gpu: ipu-v3: add DT binding for the Prefetch Resolve Engine Philipp Zabel
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