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From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Patrick Menschel <menschel.p-1KBjaw7Xf1+zQB+pC5nmwQ@public.gmane.org>
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org,
	wens-jdAy2FN1RRM@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-can-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 1/2] ARM: dts: sun4i: Add CAN node and can0_pins_a pinctrl settings
Date: Mon, 20 Mar 2017 08:49:26 +0100	[thread overview]
Message-ID: <20170320074926.fo6jgjv3qerkz2cu@lukather> (raw)
In-Reply-To: <1489325291-6298-2-git-send-email-menschel.p-1KBjaw7Xf1+zQB+pC5nmwQ@public.gmane.org>

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Hi Patrick,

On Sun, Mar 12, 2017 at 02:28:10PM +0100, Patrick Menschel wrote:
> The A10 SoC has an on-board CAN controller. This patch adds the device node
> and the corresponding pinctrl settings for pins PH20 and PH21.
> 
> This patch is adapted from the description in
> Documentation/devicetree/bindings/net/can/sun4i_can.txt
> 
> Signed-off-by: Patrick Menschel <menschel.p-1KBjaw7Xf1+zQB+pC5nmwQ@public.gmane.org>
> ---
>  arch/arm/boot/dts/sun4i-a10.dtsi | 15 +++++++++++++++
>  1 file changed, 15 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
> index b14a428..210b616 100644
> --- a/arch/arm/boot/dts/sun4i-a10.dtsi
> +++ b/arch/arm/boot/dts/sun4i-a10.dtsi
> @@ -1160,6 +1160,13 @@
>  				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
>  				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
>  			};
> +
> +			can0_pins_a: can0@0 {

That should be ordered by alphabetical order.

> +				allwinner,pins = "PH20","PH21";
> +				allwinner,function = "can";
> +				allwinner,drive = <SUN4I_PINCTRL_10_MA>;
> +				allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;

We've switched to a new, generic, binding recently for the pinctrl
nodes.

In your case, that would mean dropping "allwinner," from the pins and
functions properties, and droping the last two properties entirely.

> +			};
>  		};
>  
>  		timer@01c20c00 {
> @@ -1376,5 +1383,13 @@
>  			clocks = <&apb1_gates 7>;
>  			status = "disabled";
>  		};
> +
> +		can0: can@01c2bc00 {

And this one should be ordered by rising physical addresses.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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  parent reply	other threads:[~2017-03-20  7:49 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-12 13:28 [PATCH 0/2] ARM: dts: sunxi: Add CAN node and can0_pins_a pinctrl setting Patrick Menschel
2017-03-12 13:28 ` [PATCH 1/2] ARM: dts: sun4i: Add CAN node and can0_pins_a pinctrl settings Patrick Menschel
     [not found]   ` <1489325291-6298-2-git-send-email-menschel.p-1KBjaw7Xf1+zQB+pC5nmwQ@public.gmane.org>
2017-03-20  7:49     ` Maxime Ripard [this message]
2017-03-12 13:28 ` [PATCH 2/2] ARM: dts: sun7i: " Patrick Menschel

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