From mboxrd@z Thu Jan 1 00:00:00 1970 From: Brian Norris Subject: Re: [PATCH v3 0/4] RK3399 dw-mipi-dsi patches Date: Tue, 21 Mar 2017 12:56:34 -0700 Message-ID: <20170321195633.GB74389@google.com> References: <1489722865-22122-1-git-send-email-zyw@rock-chips.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: <1489722865-22122-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+glpar-linux-rockchip=m.gmane.org-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org To: Chris Zhong Cc: Mark Rutland , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Heiko Stuebner , David Airlie , linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Rob Herring , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Mark Yao List-Id: devicetree@vger.kernel.org On Fri, Mar 17, 2017 at 11:54:20AM +0800, Chris Zhong wrote: > Hi all > > This series set the phy_cfg_clk to be a required clock for RK3399, and > add a grf clock control in dw-mipi-dsi driver. And then correct a > register name. Series looks good to me, and works well on RK3399. Tested-by: Brian Norris