* [PATCH v3 0/4] RK3399 dw-mipi-dsi patches @ 2017-03-17 3:54 Chris Zhong 2017-03-17 3:54 ` [PATCH v3 2/4] dt-bindings: add the grf clock for dw-mipi-dsi Chris Zhong [not found] ` <1489722865-22122-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 0 siblings, 2 replies; 5+ messages in thread From: Chris Zhong @ 2017-03-17 3:54 UTC (permalink / raw) To: linux-rockchip Cc: Mark Rutland, devicetree, linux-kernel, dri-devel, Rob Herring, Chris Zhong, linux-arm-kernel Hi all This series set the phy_cfg_clk to be a required clock for RK3399, and add a grf clock control in dw-mipi-dsi driver. And then correct a register name. Changes in v3: - add a DW_MIPI_NEEDS_PHY_CFG_CLK for RK3399 - add a DW_MIPI_NEEDS_GRF_CLK for RK3399 Changes in v2: - check the grf_clk only for RK3399 Chris Zhong (4): drm/rockchip/dsi: check phy_cfg_clk only for RK3399 dt-bindings: add the grf clock for dw-mipi-dsi drm/rockchip/dsi: enable the grf clk before writing grf registers drm/rockchip/dsi: correct the grf_switch_reg name .../display/rockchip/dw_mipi_dsi_rockchip.txt | 2 +- drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 42 +++++++++++++++++----- 2 files changed, 35 insertions(+), 9 deletions(-) -- 2.6.3 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3 2/4] dt-bindings: add the grf clock for dw-mipi-dsi 2017-03-17 3:54 [PATCH v3 0/4] RK3399 dw-mipi-dsi patches Chris Zhong @ 2017-03-17 3:54 ` Chris Zhong 2017-03-21 20:17 ` Sean Paul [not found] ` <1489722865-22122-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 1 sibling, 1 reply; 5+ messages in thread From: Chris Zhong @ 2017-03-17 3:54 UTC (permalink / raw) To: linux-rockchip Cc: Mark Rutland, devicetree, linux-kernel, dri-devel, Rob Herring, Chris Zhong, linux-arm-kernel For RK3399, the grf clock should be controlled by dw-mipi-dsi driver, add the description for this clock. Signed-off-by: Chris Zhong <zyw@rock-chips.com> --- Changes in v3: None Changes in v2: None .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt index 188f6f7..7e17a60 100644 --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt @@ -10,7 +10,7 @@ Required properties: - interrupts: Represent the controller's interrupt to the CPU(s). - clocks, clock-names: Phandles to the controller's pll reference clock(ref) and APB clock(pclk). For RK3399, a phy config clock - (phy_cfg) is additional required. As described in [1]. + (phy_cfg) and a grf clock(grf) are additional required. As described in [1]. - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. - ports: contain a port node with endpoint definitions as defined in [2]. For vopb,set the reg = <0> and set the reg = <1> for vopl. -- 2.6.3 _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply related [flat|nested] 5+ messages in thread
* Re: [PATCH v3 2/4] dt-bindings: add the grf clock for dw-mipi-dsi 2017-03-17 3:54 ` [PATCH v3 2/4] dt-bindings: add the grf clock for dw-mipi-dsi Chris Zhong @ 2017-03-21 20:17 ` Sean Paul 2017-03-21 20:27 ` Sean Paul 0 siblings, 1 reply; 5+ messages in thread From: Sean Paul @ 2017-03-21 20:17 UTC (permalink / raw) To: Chris Zhong Cc: Mark Rutland, devicetree, linux-kernel, dri-devel, linux-rockchip, Rob Herring, linux-arm-kernel On Fri, Mar 17, 2017 at 11:54:22AM +0800, Chris Zhong wrote: > For RK3399, the grf clock should be controlled by dw-mipi-dsi driver, > add the description for this clock. > > Signed-off-by: Chris Zhong <zyw@rock-chips.com> > --- > > Changes in v3: None > Changes in v2: None > > .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt > index 188f6f7..7e17a60 100644 > --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt > +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt > @@ -10,7 +10,7 @@ Required properties: > - interrupts: Represent the controller's interrupt to the CPU(s). > - clocks, clock-names: Phandles to the controller's pll reference > clock(ref) and APB clock(pclk). For RK3399, a phy config clock > - (phy_cfg) is additional required. As described in [1]. > + (phy_cfg) and a grf clock(grf) are additional required. As described in [1]. These are only required for rk3399, you should make that clear. Sean > - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. > - ports: contain a port node with endpoint definitions as defined in [2]. > For vopb,set the reg = <0> and set the reg = <1> for vopl. > -- > 2.6.3 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 2/4] dt-bindings: add the grf clock for dw-mipi-dsi 2017-03-21 20:17 ` Sean Paul @ 2017-03-21 20:27 ` Sean Paul 0 siblings, 0 replies; 5+ messages in thread From: Sean Paul @ 2017-03-21 20:27 UTC (permalink / raw) To: Chris Zhong Cc: Mark Rutland, devicetree, linux-kernel, dri-devel, linux-rockchip, Rob Herring, linux-arm-kernel On Tue, Mar 21, 2017 at 04:17:00PM -0400, Sean Paul wrote: > On Fri, Mar 17, 2017 at 11:54:22AM +0800, Chris Zhong wrote: > > For RK3399, the grf clock should be controlled by dw-mipi-dsi driver, > > add the description for this clock. > > > > Signed-off-by: Chris Zhong <zyw@rock-chips.com> > > --- > > > > Changes in v3: None > > Changes in v2: None > > > > .../devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt > > index 188f6f7..7e17a60 100644 > > --- a/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt > > +++ b/Documentation/devicetree/bindings/display/rockchip/dw_mipi_dsi_rockchip.txt > > @@ -10,7 +10,7 @@ Required properties: > > - interrupts: Represent the controller's interrupt to the CPU(s). > > - clocks, clock-names: Phandles to the controller's pll reference > > clock(ref) and APB clock(pclk). For RK3399, a phy config clock > > - (phy_cfg) is additional required. As described in [1]. > > + (phy_cfg) and a grf clock(grf) are additional required. As described in [1]. > > These are only required for rk3399, you should make that clear. > I completely missed "For RK3399" on my first pass, sigh. Sorry for the reading comprehension fail. Minor nit if you want: s/additional// && s/. As/, as/ Either way, Reviewed-by: Sean Paul <seanpaul@chromium.org> Sean > Sean > > > - rockchip,grf: this soc should set GRF regs to mux vopl/vopb. > > - ports: contain a port node with endpoint definitions as defined in [2]. > > For vopb,set the reg = <0> and set the reg = <1> for vopl. > > -- > > 2.6.3 > > > > _______________________________________________ > > dri-devel mailing list > > dri-devel@lists.freedesktop.org > > https://lists.freedesktop.org/mailman/listinfo/dri-devel > > -- > Sean Paul, Software Engineer, Google / Chromium OS -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ dri-devel mailing list dri-devel@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/dri-devel ^ permalink raw reply [flat|nested] 5+ messages in thread
[parent not found: <1489722865-22122-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* Re: [PATCH v3 0/4] RK3399 dw-mipi-dsi patches [not found] ` <1489722865-22122-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2017-03-21 19:56 ` Brian Norris 0 siblings, 0 replies; 5+ messages in thread From: Brian Norris @ 2017-03-21 19:56 UTC (permalink / raw) To: Chris Zhong Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA, Heiko Stuebner, David Airlie, linux-kernel-u79uwXL29TY76Z2rM5mHXA, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Rob Herring, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Mark Yao On Fri, Mar 17, 2017 at 11:54:20AM +0800, Chris Zhong wrote: > Hi all > > This series set the phy_cfg_clk to be a required clock for RK3399, and > add a grf clock control in dw-mipi-dsi driver. And then correct a > register name. Series looks good to me, and works well on RK3399. Tested-by: Brian Norris <briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> ^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2017-03-21 20:27 UTC | newest] Thread overview: 5+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-03-17 3:54 [PATCH v3 0/4] RK3399 dw-mipi-dsi patches Chris Zhong 2017-03-17 3:54 ` [PATCH v3 2/4] dt-bindings: add the grf clock for dw-mipi-dsi Chris Zhong 2017-03-21 20:17 ` Sean Paul 2017-03-21 20:27 ` Sean Paul [not found] ` <1489722865-22122-1-git-send-email-zyw-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2017-03-21 19:56 ` [PATCH v3 0/4] RK3399 dw-mipi-dsi patches Brian Norris
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).