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From: Leo Yan <leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Suzuki K Poulose <Suzuki.Poulose-5wv7dgnIgG8@public.gmane.org>
Cc: Jonathan Corbet <corbet-T1hC0tSOHrs@public.gmane.org>,
	Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Wei Xu <xuwei5-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>,
	Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
	Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
	Andy Gross <andy.gross-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	David Brown <david.brown-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Michael Turquette
	<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
	Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
	Mathieu Poirier
	<mathieu.poirier-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	Guodong Xu <guodong.xu-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	John Stultz <john.stultz-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
	linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	mike.leach-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org,
	sudeep.holla-5wv7dgnIgG8@public.gmane.org
Subject: Re: [PATCH v5 6/9] coresight: add support for CPU debug module
Date: Wed, 29 Mar 2017 18:37:12 +0800	[thread overview]
Message-ID: <20170329103712.GA22480@leoy-linaro> (raw)
In-Reply-To: <89b6c6c7-0da0-6891-312a-c9221851c20a-5wv7dgnIgG8@public.gmane.org>

On Wed, Mar 29, 2017 at 11:31:03AM +0100, Suzuki K Poulose wrote:
> On 29/03/17 11:27, Leo Yan wrote:
> >On Wed, Mar 29, 2017 at 10:07:07AM +0100, Suzuki K Poulose wrote:
> >
> >[...]
> >
> >>>>>+	if (mode == EDDEVID_IMPL_NONE) {
> >>>>>+		drvdata->edpcsr_present  = false;
> >>>>>+		drvdata->edcidsr_present = false;
> >>>>>+		drvdata->edvidsr_present = false;
> >>>>>+	} else if (mode == EDDEVID_IMPL_EDPCSR) {
> >>>>>+		drvdata->edpcsr_present  = true;
> >>>>>+		drvdata->edcidsr_present = false;
> >>>>>+		drvdata->edvidsr_present = false;
> >>>>>+	} else if (mode == EDDEVID_IMPL_EDPCSR_EDCIDSR) {
> >>>>>+		if (!IS_ENABLED(CONFIG_64BIT) &&
> >>>>>+			(pcsr_offset == EDDEVID1_PCSR_NO_OFFSET_DIS_AARCH32))
> >>>>>+			drvdata->edpcsr_present = false;
> >>>>>+		else
> >>>>>+			drvdata->edpcsr_present = true;
> >>>>
> >>>>Sorry, I forgot why we do this check only in this mode. Shouldn't this be
> >>>>common to all modes (of course which implies PCSR is present) ?
> >>>
> >>>No. PCSROffset is defined differently in ARMv7 and ARMv8; So finally we
> >>>simplize PCSROffset value :
> >>>0000 - Sample offset applies based on the instruction state (indicated by PCSR[0])
> >>>0001 - No offset applies.
> >>>0010 - No offset applies, but do not use in AArch32 mode!
> >>>
> >>>So we need handle the corner case is when CPU runs AArch32 mode and
> >>>PCSRoffset = 'b0010. Other cases the pcsr should be present.
> >>
> >>I understand that reasoning. But my question is, why do we check for PCSROffset
> >>only when mode == EDDEVID_IMPL_EDPCSR_EDCIDSR and not for say mode == EDDEVID_IMPL_EDPCSR or
> >>any other mode where PCSR is present.
> >
> >Sorry I misunderstood your question.
> >
> >I made mistake when I analyzed the possbile combination for mode and
> >PCSROffset so I thought it's the only case should handle:
> >{ EDDEVID_IMPL_EDPCSR_EDCIDSR, EDDEVID1_PCSR_NO_OFFSET_DIS_AARCH32 }
> >
> >Below three combinations are possible to exist; so you are right, I
> >should move this out for the checking:
> >{ EDDEVID_IMPL_NONE,           EDDEVID1_PCSR_NO_OFFSET_DIS_AARCH32 }
> 
> That need not be covered, as IMPL_NONE says PCSR is not implemented hence you
> don't worry about anything as the functionality is missing. This should rather be:
> EDDEVID_IMPL_EDPCSR, where only PCSR is implemented.

I think below combination doesn't really exist:
{ EDDEVID_IMPL_EDPCSR, EDDEVID1_PCSR_NO_OFFSET_DIS_AARCH32 };

EDDEVID_IMPL_EDPCSR is only defined in ARMv7 ARM, and
EDDEVID1_PCSR_NO_OFFSET_DIS_AARCH32 is only defined in ARMv8 ARM.

> My switch...case suggestion makes it easier to do all this checking.

Agree. Will do this.

Thanks,
Leo Yan
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  parent reply	other threads:[~2017-03-29 10:37 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-25 18:23 [PATCH v5 0/9] coresight: enable debug module Leo Yan
2017-03-25 18:23 ` [PATCH v5 1/9] coresight: bindings for CPU " Leo Yan
2017-03-30 22:49   ` Rob Herring
2017-03-31  9:04   ` Suzuki K Poulose
2017-03-25 18:23 ` [PATCH v5 2/9] doc: Add documentation for Coresight CPU debug Leo Yan
2017-03-25 18:23 ` [PATCH v5 3/9] coresight: of_get_coresight_platform_data: Add missing of_node_put Leo Yan
2017-03-25 18:23 ` [PATCH v5 4/9] coresight: refactor with function of_coresight_get_cpu Leo Yan
2017-03-31  9:05   ` Suzuki K Poulose
2017-03-25 18:23 ` [PATCH v5 6/9] coresight: add support for CPU debug module Leo Yan
2017-03-27 16:34   ` Suzuki K Poulose
2017-03-29  3:07     ` Leo Yan
2017-03-29  9:07       ` Suzuki K Poulose
2017-03-29 10:27         ` Leo Yan
2017-03-29 10:31           ` Suzuki K Poulose
     [not found]             ` <89b6c6c7-0da0-6891-312a-c9221851c20a-5wv7dgnIgG8@public.gmane.org>
2017-03-29 10:37               ` Leo Yan [this message]
2017-03-29 15:50                 ` Suzuki K Poulose
2017-03-29 15:17       ` Mike Leach
2017-03-30  1:18         ` Leo Yan
2017-03-29 15:41       ` Mathieu Poirier
2017-03-28 16:50   ` Mathieu Poirier
2017-03-29  1:54     ` Leo Yan
2017-03-29 14:56       ` Mike Leach
2017-03-30  1:03         ` Leo Yan
2017-03-30  9:00           ` Suzuki K Poulose
2017-03-30 13:51             ` Leo Yan
2017-03-30 15:47         ` Sudeep Holla
2017-03-29 16:55       ` Mathieu Poirier
     [not found]         ` <20170329165535.GB24889-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-03-30  1:59           ` Leo Yan
2017-03-30 15:46             ` Mathieu Poirier
     [not found]               ` <CANLsYkwPYSvy2xjf8uuvx1WGWpGdMFy7kF=30VbvgW+jDvnFuw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-03-30 16:04                 ` Sudeep Holla
     [not found]   ` <1490466197-29163-7-git-send-email-leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-03-30 15:56     ` Sudeep Holla
2017-03-31  0:54       ` Leo Yan
2017-03-25 18:23 ` [PATCH v5 7/9] clk: hi6220: add debug APB clock Leo Yan
2017-04-04 21:51   ` Stephen Boyd
     [not found]     ` <20170404215109.GH18246-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-04-06 13:59       ` Leo Yan
2017-03-25 18:23 ` [PATCH v5 8/9] arm64: dts: hi6220: register debug module Leo Yan
     [not found] ` <1490466197-29163-1-git-send-email-leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-03-25 18:23   ` [PATCH v5 5/9] coresight: use const for device_node structures Leo Yan
     [not found]     ` <1490466197-29163-6-git-send-email-leo.yan-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-04-04 21:48       ` Stephen Boyd
2017-03-25 18:23   ` [PATCH v5 9/9] arm64: dts: qcom: msm8916: Add debug unit Leo Yan

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