From: Icenowy Zheng <icenowy-h8G6r0blFSE@public.gmane.org>
To: Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
Subject: [PATCH v3 5/5] arm64: allwinner: a64: add R_PIO pinctrl node
Date: Wed, 29 Mar 2017 18:42:46 +0800 [thread overview]
Message-ID: <20170329104246.34204-6-icenowy@aosc.io> (raw)
In-Reply-To: <20170329104246.34204-1-icenowy-h8G6r0blFSE@public.gmane.org>
From: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
Allwinner A64 have a dedicated pin controller to manage the PL pin bank.
As the driver and the required clock support are added, add the device
node for it.
Signed-off-by: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 0fe9865d4bd6..165dbc848aa6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -411,5 +411,17 @@
#clock-cells = <1>;
#reset-cells = <1>;
};
+
+ r_pio: pinctrl@01f02c00 {
+ compatible = "allwinner,sun50i-a64-r-pinctrl";
+ reg = <0x01f02c00 0x400>;
+ interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
+ clock-names = "apb", "hosc", "losc";
+ gpio-controller;
+ #gpio-cells = <3>;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ };
};
};
--
2.12.0
next prev parent reply other threads:[~2017-03-29 10:42 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-29 10:42 [PATCH v3 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs Icenowy Zheng
[not found] ` <20170329104246.34204-1-icenowy-h8G6r0blFSE@public.gmane.org>
2017-03-29 10:42 ` [PATCH v3 1/5] dt-bindings: update device tree binding for Allwinner PRCM CCUs Icenowy Zheng
[not found] ` <20170329104246.34204-2-icenowy-h8G6r0blFSE@public.gmane.org>
2017-04-03 14:49 ` Rob Herring
2017-03-29 10:42 ` [PATCH v3 2/5] clk: sunxi-ng: add support for " Icenowy Zheng
[not found] ` <20170329104246.34204-3-icenowy-h8G6r0blFSE@public.gmane.org>
2017-03-29 15:27 ` Icenowy Zheng
2017-03-29 10:42 ` [PATCH v3 3/5] arm64: allwinner: a64: add r_ccu node Icenowy Zheng
2017-03-29 10:42 ` [PATCH v3 4/5] ARM: sunxi: h3/h5: switch apb0-related clocks to r_ccu Icenowy Zheng
2017-03-29 10:42 ` Icenowy Zheng [this message]
2017-04-02 16:02 ` [PATCH v3 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs Maxime Ripard
2017-04-02 16:32 ` Icenowy Zheng
2017-04-03 7:36 ` Maxime Ripard
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