From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sergei Shtylyov Subject: [PATCH 2/3] ARM: dts: sk-rzg1m: add SCIF0 pins Date: Sat, 15 Apr 2017 00:09:43 +0300 Message-ID: <20170414211509.818645915@cogentembedded.com> Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-15 Return-path: Content-Disposition: inline; filename=ARM-dts-sk-rzg1m-add-SCIF0-pins.patch Sender: linux-renesas-soc-owner@vger.kernel.org To: Simon Horman , Rob Herring , Mark Rutland , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: Magnus Damm , Russell King , linux-arm-kernel@lists.infradead.org, Sergei Shtylyov List-Id: devicetree@vger.kernel.org Add the (previously omitted) SCIF0 pin data to the SK-RZG1M board's device tree. Signed-off-by: Sergei Shtylyov --- arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) Index: renesas/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts =================================================================== --- renesas.orig/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts +++ renesas/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts @@ -1,7 +1,7 @@ /* * Device Tree Source for the SK-RZG1M board * - * Copyright (C) 2016 Cogent Embedded, Inc. + * Copyright (C) 2016-2017 Cogent Embedded, Inc. * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any @@ -39,7 +39,17 @@ clock-frequency = <20000000>; }; +&pfc { + scif0_pins: scif0 { + groups = "scif0_data"; + function = "scif0"; + }; +}; + &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; };