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From: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
To: linux-amlogic-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	khilman-rdvid1DuHRBWk0Htik3J/w@public.gmane.org,
	carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-I+IVW8TIWO2tmTQ+vhA3Yw@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	Martin Blumenstingl
	<martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
Subject: [PATCH 0/1] add missing L2 cache properties for Meson8 and Meson8b
Date: Mon, 17 Apr 2017 23:42:43 +0200	[thread overview]
Message-ID: <20170417214244.23698-1-martin.blumenstingl@googlemail.com> (raw)

This adds three missing L2 cache properties for the cache controller
on Meson8 and Meson8b.

This patch was originally written by Carlo Caione, I just took it and
applied it to Meson8 as well and rebased it.

This patch is based on my previous series from [0]: "Amlogic Meson (32-bit)
.dts cleanups"


[0] http://lists.infradead.org/pipermail/linux-amlogic/2017-April/003399.html

Carlo Caione (1):
  ARM: dts: meson: Extend L2 cache controller node for Meson8 and
    Meson8b

 arch/arm/boot/dts/meson8.dtsi  | 6 ++++++
 arch/arm/boot/dts/meson8b.dtsi | 6 ++++++
 2 files changed, 12 insertions(+)

-- 
2.12.2

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             reply	other threads:[~2017-04-17 21:42 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-04-17 21:42 Martin Blumenstingl [this message]
     [not found] ` <20170417214244.23698-1-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-04-17 21:42   ` [PATCH 1/1] ARM: dts: meson: Extend L2 cache controller node for Meson8 and Meson8b Martin Blumenstingl
     [not found]     ` <20170417214244.23698-2-martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2017-05-19 22:50       ` Kevin Hilman

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