* [PATCH v3 1/7] ARM: dts: imx: Reintroduce 'anatop-enable-bit' where appropriate
2017-05-15 14:52 [PATCH v3 0/7] i.MX7 PCIe related device tree changes Andrey Smirnov
@ 2017-05-15 14:52 ` Andrey Smirnov
2017-05-15 14:53 ` [PATCH v3 3/7] ARM: dts: imx7s: Add node for GPC Andrey Smirnov
` (6 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Andrey Smirnov @ 2017-05-15 14:52 UTC (permalink / raw)
To: Shawn Guo
Cc: Andrey Smirnov, yurovsky, Dong Aisheng, Sascha Hauer,
Fabio Estevam, Rob Herring, Mark Rutland, Russell King,
devicetree, linux-kernel
Now that support for 'anatop-enable-bit' has been added to ANADIG
driver, reintroduce 'anatop-enable-bit' for all applicable LDOs.
Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boot/dts/imx6qdl.dtsi | 3 +++
arch/arm/boot/dts/imx6sl.dtsi | 3 +++
arch/arm/boot/dts/imx6sx.dtsi | 3 +++
arch/arm/boot/dts/imx6ul.dtsi | 1 +
arch/arm/boot/dts/imx7s.dtsi | 1 +
5 files changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index e426faa..0576ef6 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -644,6 +644,7 @@
anatop-min-bit-val = <4>;
anatop-min-voltage = <800000>;
anatop-max-voltage = <1375000>;
+ anatop-enable-bit = <0>;
};
regulator-3p0 {
@@ -658,6 +659,7 @@
anatop-min-bit-val = <0>;
anatop-min-voltage = <2625000>;
anatop-max-voltage = <3400000>;
+ anatop-enable-bit = <0>;
};
regulator-2p5 {
@@ -672,6 +674,7 @@
anatop-min-bit-val = <0>;
anatop-min-voltage = <2100000>;
anatop-max-voltage = <2875000>;
+ anatop-enable-bit = <0>;
};
reg_arm: regulator-vddcore {
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index cc9572e..3243af4 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -530,6 +530,7 @@
anatop-min-bit-val = <4>;
anatop-min-voltage = <800000>;
anatop-max-voltage = <1375000>;
+ anatop-enable-bit = <0>;
};
regulator-3p0 {
@@ -544,6 +545,7 @@
anatop-min-bit-val = <0>;
anatop-min-voltage = <2625000>;
anatop-max-voltage = <3400000>;
+ anatop-enable-bit = <0>;
};
regulator-2p5 {
@@ -558,6 +560,7 @@
anatop-min-bit-val = <0>;
anatop-min-voltage = <2100000>;
anatop-max-voltage = <2850000>;
+ anatop-enable-bit = <0>;
};
reg_arm: regulator-vddcore {
diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi
index 3f1416b..f16b9df 100644
--- a/arch/arm/boot/dts/imx6sx.dtsi
+++ b/arch/arm/boot/dts/imx6sx.dtsi
@@ -587,6 +587,7 @@
anatop-min-bit-val = <4>;
anatop-min-voltage = <800000>;
anatop-max-voltage = <1375000>;
+ anatop-enable-bit = <0>;
};
regulator-3p0 {
@@ -601,6 +602,7 @@
anatop-min-bit-val = <0>;
anatop-min-voltage = <2625000>;
anatop-max-voltage = <3400000>;
+ anatop-enable-bit = <0>;
};
regulator-2p5 {
@@ -615,6 +617,7 @@
anatop-min-bit-val = <0>;
anatop-min-voltage = <2100000>;
anatop-max-voltage = <2875000>;
+ anatop-enable-bit = <0>;
};
reg_arm: regulator-vddcore {
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index b9d7d2d..6da2b77 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -542,6 +542,7 @@
anatop-min-bit-val = <0>;
anatop-min-voltage = <2625000>;
anatop-max-voltage = <3400000>;
+ anatop-enable-bit = <0>;
};
reg_arm: regulator-vddcore {
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index c4f12fd..8fee299 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -516,6 +516,7 @@
anatop-min-bit-val = <8>;
anatop-min-voltage = <800000>;
anatop-max-voltage = <1200000>;
+ anatop-enable-bit = <0>;
};
};
--
2.9.3
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 3/7] ARM: dts: imx7s: Add node for GPC
2017-05-15 14:52 [PATCH v3 0/7] i.MX7 PCIe related device tree changes Andrey Smirnov
2017-05-15 14:52 ` [PATCH v3 1/7] ARM: dts: imx: Reintroduce 'anatop-enable-bit' where appropriate Andrey Smirnov
@ 2017-05-15 14:53 ` Andrey Smirnov
[not found] ` <20170515145305.4465-4-andrew.smirnov-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-05-15 14:53 ` [PATCH v3 4/7] ARM: dts: imx7s: Mark 'gpr' compatible with i.MX6 variant Andrey Smirnov
` (5 subsequent siblings)
7 siblings, 1 reply; 11+ messages in thread
From: Andrey Smirnov @ 2017-05-15 14:53 UTC (permalink / raw)
To: Shawn Guo
Cc: Andrey Smirnov, yurovsky, Dong Aisheng, Sascha Hauer,
Fabio Estevam, Rob Herring, Mark Rutland, Russell King,
devicetree, linux-kernel
Add node for GPC and specify as a parent interrupt controller for SoC bus.
Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boot/dts/imx7s.dtsi | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index 8fee299..ac83a6e 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -42,6 +42,7 @@
*/
#include <dt-bindings/clock/imx7d-clock.h>
+#include <dt-bindings/power/imx7-power.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -119,7 +120,7 @@
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
- interrupt-parent = <&intc>;
+ interrupt-parent = <&gpc>;
ranges;
funnel@30041000 {
@@ -301,6 +302,7 @@
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
#interrupt-cells = <3>;
interrupt-controller;
+ interrupt-parent = <&intc>;
reg = <0x31001000 0x1000>,
<0x31002000 0x2000>,
<0x31004000 0x2000>,
@@ -309,6 +311,7 @@
timer {
compatible = "arm,armv7-timer";
+ interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -564,6 +567,27 @@
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>;
};
+
+ gpc: gpc@303a0000 {
+ compatible = "fsl,imx7d-gpc";
+ reg = <0x303a0000 0x10000>;
+ interrupt-controller;
+ interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+ #interrupt-cells = <3>;
+ interrupt-parent = <&intc>;
+ #power-domain-cells = <1>;
+
+ pgc {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pgc_pcie_phy: pgc-power-domain@IMX7_POWER_DOMAIN_PCIE_PHY {
+ #power-domain-cells = <0>;
+ reg = <IMX7_POWER_DOMAIN_PCIE_PHY>;
+ power-supply = <®_1p0d>;
+ };
+ };
+ };
};
aips2: aips-bus@30400000 {
--
2.9.3
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 4/7] ARM: dts: imx7s: Mark 'gpr' compatible with i.MX6 variant
2017-05-15 14:52 [PATCH v3 0/7] i.MX7 PCIe related device tree changes Andrey Smirnov
2017-05-15 14:52 ` [PATCH v3 1/7] ARM: dts: imx: Reintroduce 'anatop-enable-bit' where appropriate Andrey Smirnov
2017-05-15 14:53 ` [PATCH v3 3/7] ARM: dts: imx7s: Add node for GPC Andrey Smirnov
@ 2017-05-15 14:53 ` Andrey Smirnov
2017-05-15 14:53 ` [PATCH v3 5/7] ARM: dts: imx7d-sdb: Add GPIO expander node Andrey Smirnov
` (4 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Andrey Smirnov @ 2017-05-15 14:53 UTC (permalink / raw)
To: Shawn Guo
Cc: Andrey Smirnov, yurovsky, Dong Aisheng, Sascha Hauer,
Fabio Estevam, Rob Herring, Mark Rutland, Russell King,
devicetree, linux-kernel
List GPR block as compatible "fsl,imx6q-iomuxc-gpr" to support drivers
requesting it that way (PCIe driver is one example).
Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boot/dts/imx7s.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/imx7s.dtsi b/arch/arm/boot/dts/imx7s.dtsi
index ac83a6e..5e6373d 100644
--- a/arch/arm/boot/dts/imx7s.dtsi
+++ b/arch/arm/boot/dts/imx7s.dtsi
@@ -491,7 +491,8 @@
};
gpr: iomuxc-gpr@30340000 {
- compatible = "fsl,imx7d-iomuxc-gpr", "syscon";
+ compatible = "fsl,imx7d-iomuxc-gpr",
+ "fsl,imx6q-iomuxc-gpr", "syscon";
reg = <0x30340000 0x10000>;
};
--
2.9.3
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 5/7] ARM: dts: imx7d-sdb: Add GPIO expander node
2017-05-15 14:52 [PATCH v3 0/7] i.MX7 PCIe related device tree changes Andrey Smirnov
` (2 preceding siblings ...)
2017-05-15 14:53 ` [PATCH v3 4/7] ARM: dts: imx7s: Mark 'gpr' compatible with i.MX6 variant Andrey Smirnov
@ 2017-05-15 14:53 ` Andrey Smirnov
2017-05-15 14:53 ` [PATCH v3 6/7] ARM: dts: imx7d: Add node for PCIe controller Andrey Smirnov
` (3 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Andrey Smirnov @ 2017-05-15 14:53 UTC (permalink / raw)
To: Shawn Guo
Cc: Andrey Smirnov, yurovsky, Dong Aisheng, Sascha Hauer,
Fabio Estevam, Rob Herring, Mark Rutland, Russell King,
devicetree, linux-kernel
Add node for U38, a 74LV595PW serial-in shift register that acts as a
GPIO expander on the board.
Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boot/dts/imx7d-sdb.dts | 29 +++++++++++++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 5be01a1..d6f2dda 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -52,6 +52,27 @@
reg = <0x80000000 0x80000000>;
};
+ spi4 {
+ compatible = "spi-gpio";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi4>;
+ gpio-sck = <&gpio1 13 GPIO_ACTIVE_HIGH>;
+ gpio-mosi = <&gpio1 9 GPIO_ACTIVE_HIGH>;
+ cs-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+ num-chipselects = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ extended_io: gpio-expander@0 {
+ compatible = "fairchild,74hc595";
+ gpio-controller;
+ #gpio-cells = <2>;
+ reg = <0>;
+ registers-number = <1>;
+ spi-max-frequency = <100000>;
+ };
+ };
+
regulators {
compatible = "simple-bus";
#address-cells = <1>;
@@ -642,5 +663,13 @@
fsl,pins = <
MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x110b0
>;
+
+ pinctrl_spi4: spi4grp {
+ fsl,pins = <
+ MX7D_PAD_GPIO1_IO09__GPIO1_IO9 0x59
+ MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x59
+ MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x59
+ >;
+ };
};
};
--
2.9.3
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 6/7] ARM: dts: imx7d: Add node for PCIe controller
2017-05-15 14:52 [PATCH v3 0/7] i.MX7 PCIe related device tree changes Andrey Smirnov
` (3 preceding siblings ...)
2017-05-15 14:53 ` [PATCH v3 5/7] ARM: dts: imx7d-sdb: Add GPIO expander node Andrey Smirnov
@ 2017-05-15 14:53 ` Andrey Smirnov
2017-05-15 14:53 ` [PATCH v3 7/7] ARM: dts: imx7d-sdb: Enable PCIe peripheral Andrey Smirnov
` (2 subsequent siblings)
7 siblings, 0 replies; 11+ messages in thread
From: Andrey Smirnov @ 2017-05-15 14:53 UTC (permalink / raw)
To: Shawn Guo
Cc: Andrey Smirnov, yurovsky, Dong Aisheng, Sascha Hauer,
Fabio Estevam, Rob Herring, Mark Rutland, Russell King,
devicetree, linux-kernel
Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boot/dts/imx7d.dtsi | 37 +++++++++++++++++++++++++++++++++++++
1 file changed, 37 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi
index f6dee41..f46814a 100644
--- a/arch/arm/boot/dts/imx7d.dtsi
+++ b/arch/arm/boot/dts/imx7d.dtsi
@@ -42,6 +42,7 @@
*/
#include "imx7s.dtsi"
+#include <dt-bindings/reset/imx7-reset.h>
/ {
cpus {
@@ -127,6 +128,42 @@
fsl,num-rx-queues=<3>;
status = "disabled";
};
+
+ pcie: pcie@0x33800000 {
+ compatible = "fsl,imx7d-pcie", "snps,dw-pcie";
+ reg = <0x33800000 0x4000>,
+ <0x4ff00000 0x80000>;
+ reg-names = "dbi", "config";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges = <0x81000000 0 0 0x4ff80000 0 0x00010000 /* downstream I/O */
+ 0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */
+ num-lanes = <1>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "msi";
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 0x7>;
+ interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
+ <0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>,
+ <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,
+ <&clks IMX7D_PCIE_PHY_ROOT_CLK>;
+ clock-names = "pcie", "pcie_bus", "pcie_phy";
+ assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>,
+ <&clks IMX7D_PCIE_PHY_ROOT_SRC>;
+ assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>,
+ <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
+
+ fsl,max-link-speed = <2>;
+ power-domains = <&pgc_pcie_phy>;
+ resets = <&src IMX7_RESET_PCIEPHY>,
+ <&src IMX7_RESET_PCIE_CTRL_APPS_EN>;
+ reset-names = "pciephy", "apps";
+ status = "disabled";
+ };
};
&ca_funnel_ports {
--
2.9.3
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 7/7] ARM: dts: imx7d-sdb: Enable PCIe peripheral
2017-05-15 14:52 [PATCH v3 0/7] i.MX7 PCIe related device tree changes Andrey Smirnov
` (4 preceding siblings ...)
2017-05-15 14:53 ` [PATCH v3 6/7] ARM: dts: imx7d: Add node for PCIe controller Andrey Smirnov
@ 2017-05-15 14:53 ` Andrey Smirnov
2017-05-15 15:03 ` [PATCH v3 2/7] ARM: imx: Select GPCv2 for i.MX7 Andrey Smirnov
2017-05-21 1:55 ` [PATCH v3 0/7] i.MX7 PCIe related device tree changes Shawn Guo
7 siblings, 0 replies; 11+ messages in thread
From: Andrey Smirnov @ 2017-05-15 14:53 UTC (permalink / raw)
To: Shawn Guo
Cc: Andrey Smirnov, yurovsky, Dong Aisheng, Sascha Hauer,
Fabio Estevam, Rob Herring, Mark Rutland, Russell King,
devicetree, linux-kernel
Enable PCIe peripheral on this board.
Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/boot/dts/imx7d-sdb.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index d6f2dda..77c400f 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -349,6 +349,11 @@
};
};
+&pcie {
+ reset-gpio = <&extended_io 1 GPIO_ACTIVE_LOW>;
+ status = "okay";
+};
+
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
--
2.9.3
^ permalink raw reply related [flat|nested] 11+ messages in thread* [PATCH v3 2/7] ARM: imx: Select GPCv2 for i.MX7
2017-05-15 14:52 [PATCH v3 0/7] i.MX7 PCIe related device tree changes Andrey Smirnov
` (5 preceding siblings ...)
2017-05-15 14:53 ` [PATCH v3 7/7] ARM: dts: imx7d-sdb: Enable PCIe peripheral Andrey Smirnov
@ 2017-05-15 15:03 ` Andrey Smirnov
2017-05-21 1:55 ` [PATCH v3 0/7] i.MX7 PCIe related device tree changes Shawn Guo
7 siblings, 0 replies; 11+ messages in thread
From: Andrey Smirnov @ 2017-05-15 15:03 UTC (permalink / raw)
To: Shawn Guo
Cc: Andrey Smirnov, yurovsky, Dong Aisheng, Sascha Hauer,
Fabio Estevam, Rob Herring, Mark Rutland, Russell King,
devicetree, linux-kernel, linux-arm-kernel
GPCv2 IP block is a part of i.MX7 SoC. Select it to make corresponding
driver availible to support DT changes following this patch.
Cc: yurovsky@gmail.com
Cc: Dong Aisheng <aisheng.dong@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
---
arch/arm/mach-imx/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 936c59d..782699e 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -536,6 +536,7 @@ config SOC_IMX7D
select HAVE_IMX_ANATOP
select HAVE_IMX_MMDC
select HAVE_IMX_SRC
+ select IMX_GPCV2
help
This enables support for Freescale i.MX7 Dual processor.
--
2.9.3
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [PATCH v3 0/7] i.MX7 PCIe related device tree changes
2017-05-15 14:52 [PATCH v3 0/7] i.MX7 PCIe related device tree changes Andrey Smirnov
` (6 preceding siblings ...)
2017-05-15 15:03 ` [PATCH v3 2/7] ARM: imx: Select GPCv2 for i.MX7 Andrey Smirnov
@ 2017-05-21 1:55 ` Shawn Guo
7 siblings, 0 replies; 11+ messages in thread
From: Shawn Guo @ 2017-05-21 1:55 UTC (permalink / raw)
To: Andrey Smirnov
Cc: yurovsky, Dong Aisheng, Sascha Hauer, Fabio Estevam, Rob Herring,
Mark Rutland, Russell King, devicetree, linux-kernel,
linux-arm-kernel
On Mon, May 15, 2017 at 07:52:58AM -0700, Andrey Smirnov wrote:
> Andrey Smirnov (7):
> ARM: dts: imx: Reintroduce 'anatop-enable-bit' where appropriate
> ARM: imx: Select GPCv2 for i.MX7
> ARM: dts: imx7s: Add node for GPC
> ARM: dts: imx7s: Mark 'gpr' compatible with i.MX6 variant
> ARM: dts: imx7d-sdb: Add GPIO expander node
> ARM: dts: imx7d: Add node for PCIe controller
> ARM: dts: imx7d-sdb: Enable PCIe peripheral
Applied all, thanks.
^ permalink raw reply [flat|nested] 11+ messages in thread