From: Jiada Wang <jiada_wang-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
To: broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org,
fabio.estevam-3arQi8VN3Tc@public.gmane.org
Cc: linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH linux-next v3 1/4] spi: imx: introduce fifo_size and has_dmamode in spi_imx_devtype_data
Date: Mon, 5 Jun 2017 12:38:06 +0900 [thread overview]
Message-ID: <20170605033809.13726-2-jiada_wang@mentor.com> (raw)
In-Reply-To: <20170605033809.13726-1-jiada_wang-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
Different ECSPI controller has different fifosize and DMA capability,
instead of calling functions to identify these information by check
devtype. add fifo_size and has_dmamode to spi_imx_devtype_data.
so that these information can be directly accessed.
Signed-off-by: Jiada Wang <jiada_wang-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
---
drivers/spi/spi-imx.c | 27 ++++++++++++++++++---------
1 file changed, 18 insertions(+), 9 deletions(-)
diff --git a/drivers/spi/spi-imx.c b/drivers/spi/spi-imx.c
index b402530..e48989a 100644
--- a/drivers/spi/spi-imx.c
+++ b/drivers/spi/spi-imx.c
@@ -78,6 +78,8 @@ struct spi_imx_devtype_data {
void (*trigger)(struct spi_imx_data *);
int (*rx_available)(struct spi_imx_data *);
void (*reset)(struct spi_imx_data *);
+ bool has_dmamode;
+ unsigned int fifo_size;
enum spi_imx_devtype devtype;
};
@@ -128,11 +130,6 @@ static inline int is_imx51_ecspi(struct spi_imx_data *d)
return d->devtype_data->devtype == IMX51_ECSPI;
}
-static inline unsigned spi_imx_get_fifosize(struct spi_imx_data *d)
-{
- return is_imx51_ecspi(d) ? 64 : 8;
-}
-
#define MXC_SPI_BUF_RX(type) \
static void spi_imx_buf_rx_##type(struct spi_imx_data *spi_imx) \
{ \
@@ -229,7 +226,7 @@ static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
if (bpw != 1 && bpw != 2 && bpw != 4)
return false;
- for (i = spi_imx_get_fifosize(spi_imx) / 2; i > 0; i--) {
+ for (i = spi_imx->devtype_data->fifo_size / 2; i > 0; i--) {
if (!(transfer->len % (i * bpw)))
break;
}
@@ -704,6 +701,8 @@ static struct spi_imx_devtype_data imx1_cspi_devtype_data = {
.trigger = mx1_trigger,
.rx_available = mx1_rx_available,
.reset = mx1_reset,
+ .fifo_size = 8,
+ .has_dmamode = false,
.devtype = IMX1_CSPI,
};
@@ -713,6 +712,8 @@ static struct spi_imx_devtype_data imx21_cspi_devtype_data = {
.trigger = mx21_trigger,
.rx_available = mx21_rx_available,
.reset = mx21_reset,
+ .fifo_size = 8,
+ .has_dmamode = false,
.devtype = IMX21_CSPI,
};
@@ -723,6 +724,8 @@ static struct spi_imx_devtype_data imx27_cspi_devtype_data = {
.trigger = mx21_trigger,
.rx_available = mx21_rx_available,
.reset = mx21_reset,
+ .fifo_size = 8,
+ .has_dmamode = false,
.devtype = IMX27_CSPI,
};
@@ -732,6 +735,8 @@ static struct spi_imx_devtype_data imx31_cspi_devtype_data = {
.trigger = mx31_trigger,
.rx_available = mx31_rx_available,
.reset = mx31_reset,
+ .fifo_size = 8,
+ .has_dmamode = false,
.devtype = IMX31_CSPI,
};
@@ -742,6 +747,8 @@ static struct spi_imx_devtype_data imx35_cspi_devtype_data = {
.trigger = mx31_trigger,
.rx_available = mx31_rx_available,
.reset = mx31_reset,
+ .fifo_size = 8,
+ .has_dmamode = true,
.devtype = IMX35_CSPI,
};
@@ -751,6 +758,8 @@ static struct spi_imx_devtype_data imx51_ecspi_devtype_data = {
.trigger = mx51_ecspi_trigger,
.rx_available = mx51_ecspi_rx_available,
.reset = mx51_ecspi_reset,
+ .fifo_size = 64,
+ .has_dmamode = true,
.devtype = IMX51_ECSPI,
};
@@ -802,7 +811,7 @@ static void spi_imx_chipselect(struct spi_device *spi, int is_active)
static void spi_imx_push(struct spi_imx_data *spi_imx)
{
- while (spi_imx->txfifo < spi_imx_get_fifosize(spi_imx)) {
+ while (spi_imx->txfifo < spi_imx->devtype_data->fifo_size) {
if (!spi_imx->count)
break;
spi_imx->tx(spi_imx);
@@ -956,7 +965,7 @@ static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx,
if (of_machine_is_compatible("fsl,imx6dl"))
return 0;
- spi_imx->wml = spi_imx_get_fifosize(spi_imx) / 2;
+ spi_imx->wml = spi_imx->devtype_data->fifo_size / 2;
/* Prepare for TX DMA: */
master->dma_tx = dma_request_slave_channel_reason(dev, "tx");
@@ -1282,7 +1291,7 @@ static int spi_imx_probe(struct platform_device *pdev)
* Only validated on i.mx35 and i.mx6 now, can remove the constraint
* if validated on other chips.
*/
- if (is_imx35_cspi(spi_imx) || is_imx51_ecspi(spi_imx)) {
+ if (spi_imx->devtype_data->has_dmamode) {
ret = spi_imx_sdma_init(&pdev->dev, spi_imx, master);
if (ret == -EPROBE_DEFER)
goto out_clk_put;
--
2.9.3
--
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next prev parent reply other threads:[~2017-06-05 3:38 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-05 3:38 [PATCH linux-next v3 0/4] i.MX ECSPI controller slave mode support Jiada Wang
[not found] ` <20170605033809.13726-1-jiada_wang-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2017-06-05 3:38 ` Jiada Wang [this message]
[not found] ` <20170605033809.13726-2-jiada_wang-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2017-06-07 19:09 ` [PATCH linux-next v3 1/4] spi: imx: introduce fifo_size and has_dmamode in spi_imx_devtype_data Mark Brown
2017-06-05 3:38 ` [PATCH linux-next v3 2/4] spi: imx: add selection for iMX53 and iMX6 controller Jiada Wang
[not found] ` <20170605033809.13726-3-jiada_wang-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2017-07-11 14:43 ` Applied "spi: imx: add selection for iMX53 and iMX6 controller" to the spi tree Mark Brown
2017-06-05 3:38 ` [PATCH linux-next v3 3/4] ARM: dts: imx: change compatiblity for SPI controllers on imx53 later soc Jiada Wang
2017-06-05 3:38 ` [PATCH linux-next v4 4/4] spi: imx: Add support for SPI Slave mode Jiada Wang
[not found] ` <20170605033809.13726-5-jiada_wang-nmGgyN9QBj3QT0dZR+AlfA@public.gmane.org>
2017-06-07 8:41 ` Sascha Hauer
[not found] ` <20170607084125.3eizzs6c773xjssi-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2017-06-07 8:51 ` Jiada Wang
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