From mboxrd@z Thu Jan 1 00:00:00 1970 From: Tony Lindgren Subject: Re: [PATCH 0/6] Init Clock frequences for accelerators Date: Mon, 12 Jun 2017 00:36:36 -0700 Message-ID: <20170612073635.GT3730@atomide.com> References: <20170607212730.33002-1-s-anna@ti.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <20170607212730.33002-1-s-anna-l0cyMroinI0@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Suman Anna Cc: Tero Kristo , Lokesh Vutla , Subhajit Paul , linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org * Suman Anna [170607 14:31]: > Hi Tony, > > The following series configures the initial frequencies for the required > DPLLs and corresponding output divider clocks used by various remoteproc > accelerators (DSP, IVAHD) on OMAP4, OMAP5 & DRA7xx/AM57xx SoCs and the > GPU on DRA7xx/AM57xx SoCs. All these devices require Adaptive Voltage > Scaling (AVS) to be programmed at all OPPs at boot time, which is > programmed in the bootloader. Furthermore, DVFS is not supported on > these domains implying a one-time OPP clock frequency setup. Tero, care to comment or ack this series? Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html