From: Will Deacon <will.deacon@arm.com>
To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Cc: "robin.murphy@arm.com" <robin.murphy@arm.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>,
John Garry <john.garry@huawei.com>,
Gabriele Paoloni <gabriele.paoloni@huawei.com>,
"Guohanjun (Hanjun Guo)" <guohanjun@huawei.com>,
"xuwei (O)" <xuwei5@hisilicon.com>,
Linuxarm <linuxarm@huawei.com>,
"devel@acpica.org" <devel@acpica.org>,
"linux-acpi@vger.kernel.org" <linux-acpi@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH] iommu/arm-smmu-v3: Enable ACPI based HiSilicon CMD_PREFETCH quirk(erratum 161010701)
Date: Fri, 23 Jun 2017 13:02:08 +0100 [thread overview]
Message-ID: <20170623120207.GA2310@arm.com> (raw)
In-Reply-To: <5FC3163CFD30C246ABAA99954A238FA838388F08@FRAEML521-MBS.china.huawei.com>
On Fri, Jun 23, 2017 at 08:29:28AM +0000, Shameerali Kolothum Thodi wrote:
> > -----Original Message-----
> > From: Shameerali Kolothum Thodi
> > Sent: Wednesday, May 17, 2017 10:12 AM
> > To: robin.murphy@arm.com; will.deacon@arm.com;
> > mark.rutland@arm.com; lorenzo.pieralisi@arm.com
> > Cc: John Garry; Gabriele Paoloni; Guohanjun (Hanjun Guo); xuwei (O);
> > Linuxarm; devel@acpica.org; linux-acpi@vger.kernel.org; linux-arm-
> > kernel@lists.infradead.org; devicetree@vger.kernel.org; Shameerali
> > Kolothum Thodi
> > Subject: [PATCH] iommu/arm-smmu-v3: Enable ACPI based HiSilicon
> > CMD_PREFETCH quirk(erratum 161010701)
> >
> > HiSilicon SMMUv3 on Hip06/Hip07 platforms doesn't support CMD_PREFETCH
> > command. The dt based support for this quirk is already present in the
> > driver(hisilicon,broken-prefetch-cmd). This adds ACPI support for the
> > quirk using the IORT smmu model number.
>
> This also has dependency on acpica header update and it looks like it's going
> to take a while to appear on Linux mainline. I have seen patches where a
> temp local definition for SMMU v3 model number is suggested instead.
>
> Could you please let me know the plan so that I can base this patch similar
> to or on top of Caviums "[PATCH] iommu/arm-smmu-v3, acpi: Add temporary
> Cavium SMMU-V3 IORT model number definitions"
I think I've got this in hand, but I'll shout if I run into any issues.
Will
next prev parent reply other threads:[~2017-06-23 12:02 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-17 9:12 [PATCH] iommu/arm-smmu-v3: Enable ACPI based HiSilicon CMD_PREFETCH quirk(erratum 161010701) shameer
2017-06-23 8:29 ` Shameerali Kolothum Thodi
2017-06-23 12:02 ` Will Deacon [this message]
2017-06-23 12:49 ` Shameerali Kolothum Thodi
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