From: Stephen Boyd <sboyd@codeaurora.org>
To: Marek Vasut <marek.vasut@gmail.com>
Cc: linux-clk@vger.kernel.org,
Marek Vasut <marek.vasut+renesas@gmail.com>,
Alexey Firago <alexey_firago@mentor.com>,
Rob Herring <robh@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH V3 7/8] clk: vc5: Add bindings for IDT VersaClock 5P49V6901
Date: Wed, 12 Jul 2017 16:10:32 -0700 [thread overview]
Message-ID: <20170712231032.GM22780@codeaurora.org> (raw)
In-Reply-To: <20170709132814.2339-7-marek.vasut+renesas@gmail.com>
On 07/09, Marek Vasut wrote:
> IDT VersaClock 6 5P49V6901 has 4 clock outputs, 4 fractional dividers.
> Input clock source can be taken from either external crystal or from
> external reference clock.
>
> Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
> Cc: Alexey Firago <alexey_firago@mentor.com>
> Cc: Rob Herring <robh@kernel.org>
> Cc: Stephen Boyd <sboyd@codeaurora.org>
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> Cc: linux-renesas-soc@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Acked-by: Rob Herring <robh@kernel.org>
> ---
Applied to clk-next
--
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project
prev parent reply other threads:[~2017-07-12 23:10 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20170709132814.2339-1-marek.vasut+renesas@gmail.com>
[not found] ` <20170709132814.2339-1-marek.vasut+renesas-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2017-07-09 13:28 ` [PATCH V3 7/8] clk: vc5: Add bindings for IDT VersaClock 5P49V6901 Marek Vasut
2017-07-12 23:10 ` Stephen Boyd [this message]
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