From: Bjorn Andersson <bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
To: Varadarajan Narayanan <varada-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Cc: bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
svarbanov-NEYub+7Iv8PQT0dZR+AlfA@public.gmane.org,
kishon-l0cyMroinI0@public.gmane.org,
sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
vivek.gautam-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org,
fengguang.wu-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
weiyongjun1-hv44wF8Li93QT0dZR+AlfA@public.gmane.org,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 3/7] phy: qcom-qmp: Fix phy pipe clock name
Date: Mon, 17 Jul 2017 15:30:47 -0700 [thread overview]
Message-ID: <20170717223047.GA20973@minitux> (raw)
In-Reply-To: <1500293043-1887-4-git-send-email-varada-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
On Mon 17 Jul 05:03 PDT 2017, Varadarajan Narayanan wrote:
> Presently, the phy pipe clock's name is assumed to be either
> usb3_phy_pipe_clk_src or pcie_XX_pipe_clk_src (where XX is the
> phy lane's number). However, this will not work if an SoC has
> more than one instance of the phy. Hence, instead of assuming
> the name of the clock, fetch it from the DT.
>
Adding the support to fetch this from DT looks reasonable, but you
should make sure to fall back to the old logic in case you don't find a
"clock-output-names" property.
[..]
> @@ -1110,6 +1103,8 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
>
> id = 0;
> for_each_available_child_of_node(dev->of_node, child) {
> + const char *clk_name;
> +
> /* Create per-lane phy */
> ret = qcom_qmp_phy_create(dev, child, id);
> if (ret) {
> @@ -1118,11 +1113,20 @@ static int qcom_qmp_phy_probe(struct platform_device *pdev)
> return ret;
> }
>
> + ret = of_property_read_string(child, "clock-output-names",
> + &clk_name);
> + if (ret) {
This would be the case for any existing dts files, so you're not allowed
to treat this as an error.
> + dev_err(dev,
> + "failed to get clock-output-names for lane%d phy, %d\n",
> + id, ret);
> + return ret;
> + }
> +
Regards,
Bjorn
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next prev parent reply other threads:[~2017-07-17 22:30 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-17 12:03 [PATCH 0/7] Add support for IPQ8074 PCIe phy and controller Varadarajan Narayanan
2017-07-17 12:03 ` [PATCH 1/7] dt-bindings: phy: qmp: Add output-clock-names Varadarajan Narayanan
[not found] ` <1500293043-1887-2-git-send-email-varada-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-17 20:15 ` Rob Herring
2017-07-17 12:03 ` [PATCH 2/7] dt-bindings: phy: qmp: Add support for QMP phy in IPQ8074 Varadarajan Narayanan
2017-07-17 20:16 ` Rob Herring
2017-07-17 12:03 ` [PATCH 3/7] phy: qcom-qmp: Fix phy pipe clock name Varadarajan Narayanan
[not found] ` <1500293043-1887-4-git-send-email-varada-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-07-17 22:30 ` Bjorn Andersson [this message]
2017-07-18 8:54 ` Varadarajan Narayanan
2017-07-18 16:56 ` Bjorn Andersson
2017-07-19 3:08 ` Vivek Gautam
2017-07-19 3:10 ` Vivek Gautam
2017-07-17 12:04 ` [PATCH 4/7] phy: qcom-qmp: Handle unavailable registers Varadarajan Narayanan
2017-07-17 12:04 ` [PATCH 5/7] phy: qcom-qmp: Add support for IPQ8074 Varadarajan Narayanan
2017-07-17 12:04 ` [PATCH 6/7] dt-bindings: pci: qcom: " Varadarajan Narayanan
2017-07-17 20:17 ` Rob Herring
2017-07-17 12:04 ` [PATCH 7/7] PCI: dwc: qcom: Add support for IPQ8074 PCIe controller Varadarajan Narayanan
2017-07-17 22:07 ` Bjorn Andersson
2017-07-18 9:58 ` Varadarajan Narayanan
2017-07-18 16:44 ` Bjorn Andersson
2017-07-19 6:49 ` Varadarajan Narayanan
2017-07-19 7:12 ` Stanimir Varbanov
2017-07-19 9:29 ` Varadarajan Narayanan
2017-07-19 10:06 ` Vivek Gautam
2017-07-19 15:41 ` Stanimir Varbanov
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