From: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: Ulf Hansson <ulf.hansson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Michael Turquette
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Stephen Boyd <sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Subject: Re: [PATCH v2 02/10] clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching
Date: Fri, 21 Jul 2017 09:19:48 +0200 [thread overview]
Message-ID: <20170721071948.jofji4lwbq6s4ims@flea> (raw)
In-Reply-To: <20170720034452.15920-3-wens-jdAy2FN1RRM@public.gmane.org>
[-- Attachment #1: Type: text/plain, Size: 1085 bytes --]
On Thu, Jul 20, 2017 at 11:44:44AM +0800, Chen-Yu Tsai wrote:
> +/* Special class of M-P clock that supports MMC timing modes */
> +
> +#define SUNXI_CCU_MP_MMC_WITH_MUX_GATE(_struct, _name, _parents, _reg, \
> + _mshift, _mwidth, \
> + _pshift, _pwidth, \
> + _muxshift, _muxwidth, \
> + _gate, _flags) \
> + struct ccu_mp _struct = { \
> + .enable = _gate, \
> + .m = _SUNXI_CCU_DIV(_mshift, _mwidth), \
> + .p = _SUNXI_CCU_DIV(_pshift, _pwidth), \
> + .mux = _SUNXI_CCU_MUX(_muxshift, _muxwidth), \
> + .common = { \
> + .reg = _reg, \
> + .features = CCU_FEATURE_MMC_TIMING_SWITCH, \
> + .hw.init = CLK_HW_INIT_PARENTS(_name, \
> + _parents, \
> + &ccu_mp_mmc_ops, \
> + _flags), \
> + } \
> + }
> +
> +extern const struct clk_ops ccu_mp_mmc_ops;
> +
I guess we can simplify a lot that macro, all the new-timings MMC
clocks have the same register layout.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
next prev parent reply other threads:[~2017-07-21 7:19 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-20 3:44 [PATCH v2 00/10] ARM: sun8i: a83t: Add support for MMC controllers Chen-Yu Tsai
[not found] ` <20170720034452.15920-1-wens-jdAy2FN1RRM@public.gmane.org>
2017-07-20 3:44 ` [PATCH v2 01/10] clk: sunxi-ng: Add interface to query or configure MMC timing modes Chen-Yu Tsai
2017-07-21 7:18 ` Maxime Ripard
2017-07-21 7:23 ` Chen-Yu Tsai
2017-07-20 3:44 ` [PATCH v2 02/10] clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switching Chen-Yu Tsai
[not found] ` <20170720034452.15920-3-wens-jdAy2FN1RRM@public.gmane.org>
2017-07-21 7:19 ` Maxime Ripard [this message]
2017-07-20 3:44 ` [PATCH v2 03/10] clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock Chen-Yu Tsai
2017-07-20 3:44 ` [PATCH v2 04/10] mmc: sunxi: Support controllers that can use both old and new timings Chen-Yu Tsai
[not found] ` <20170720034452.15920-5-wens-jdAy2FN1RRM@public.gmane.org>
2017-07-21 7:20 ` Maxime Ripard
2017-07-20 3:44 ` [PATCH v2 05/10] mmc: sunxi: Support MMC DDR52 transfer mode with new timing mode Chen-Yu Tsai
[not found] ` <20170720034452.15920-6-wens-jdAy2FN1RRM@public.gmane.org>
2017-07-21 7:21 ` Maxime Ripard
2017-07-20 3:44 ` [PATCH v2 06/10] mmc: sunxi: Add support for A83T eMMC (MMC2) Chen-Yu Tsai
2017-07-21 7:21 ` Maxime Ripard
2017-07-20 3:44 ` [PATCH v2 07/10] ARM: dts: sun8i: a83t: Add MMC controller device nodes Chen-Yu Tsai
[not found] ` <20170720034452.15920-8-wens-jdAy2FN1RRM@public.gmane.org>
2017-07-23 0:36 ` kbuild test robot
2017-07-20 3:44 ` [PATCH v2 08/10] ARM: dts: sun8i: a83t: Add pingroup for 8-bit eMMC on mmc2 Chen-Yu Tsai
2017-07-20 3:44 ` [PATCH v2 09/10] ARM: dts: sun8i: a83t: cubietruck-plus: Enable micro-SD card and eMMC Chen-Yu Tsai
2017-07-20 3:44 ` [PATCH v2 10/10] ARM: dts: sun8i: a83t: h8homlet: Enable micro-SD card and onboard eMMC Chen-Yu Tsai
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