Re: [PATCH v2 05/10] mmc: sunxi: Support MMC DDR52 transfer mode with new timing mode

Maxime Ripard
2017-07-21T07:21:16Z

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On Thu, Jul 20, 2017 at 11:44:47AM +0800, Chen-Yu Tsai wrote:
> The MMC controller can support DDR52 transfers under the new timing
> mode. According to the BSP kernel, the module clock has to be double
> the card clock, regardless of the bus width. The default timings in
> the hardware can be used.
>
> This also reworks the code setting the internal divider, getting rid
> of a extra conditional.
>
> Signed-off-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>

Acked-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>

Thanks!
Maxime

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Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering