From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: Re: [PATCH v3 03/10] clk: sunxi-ng: a83t: Support new timing mode for mmc2 clock Date: Tue, 25 Jul 2017 09:33:11 +0200 Message-ID: <20170725073311.kyfsvf4xzrzlhgp5@flea> References: <20170724135905.28855-1-wens@csie.org> <20170724135905.28855-4-wens@csie.org> Reply-To: maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="jhwtdsaj52mmq6xp" Return-path: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Content-Disposition: inline In-Reply-To: <20170724135905.28855-4-wens-jdAy2FN1RRM@public.gmane.org> List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , To: Chen-Yu Tsai Cc: Ulf Hansson , Michael Turquette , Stephen Boyd , Rob Herring , Mark Rutland , linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-mmc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Id: devicetree@vger.kernel.org --jhwtdsaj52mmq6xp Content-Type: text/plain; charset="UTF-8" Content-Disposition: inline On Mon, Jul 24, 2017 at 09:58:58PM +0800, Chen-Yu Tsai wrote: > The MMC2 clock supports a new timing mode. When the new mode is active, > the output clock rate is halved. > > This patch sets the feature flag for the new timing mode, and adds > a pre-divider based on the mode bit. > > Signed-off-by: Chen-Yu Tsai Acked-by: Maxime Ripard Thanks! Maxime -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com --jhwtdsaj52mmq6xp--