* [PATCH v2] arm64: dts: ls1012a: add USB host controller nodes
@ 2017-07-14 6:49 Ran Wang
2017-07-25 8:03 ` Shawn Guo
0 siblings, 1 reply; 2+ messages in thread
From: Ran Wang @ 2017-07-14 6:49 UTC (permalink / raw)
To: Shawn Guo, Rob Herring, Mark Rutland, Catalin Marinas,
Will Deacon
Cc: Tang Yuantian, Horia Geantă, Marc Zyngier, Mihai Bantea,
Scott Wood, Liu Gang, York Sun,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM64 PORT (AARCH64 ARCHITECTURE), open list,
Ran Wang
LS1012A has one USB 3.0(DWC3) controller and
one USB 2.0 controller.
Signed-off-by: Ran Wang <ran.wang_1-3arQi8VN3Tc@public.gmane.org>
---
Change in v2:
Move node usb2@8600000 to the back of sata@3200000 to keep nodes
sorted in unit-address.
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
index b1554cb..df83915 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
@@ -444,6 +444,15 @@
<&clockgen 4 3>;
};
+ usb0: usb3@2f00000 {
+ compatible = "snps,dwc3";
+ reg = <0x0 0x2f00000 0x0 0x10000>;
+ interrupts = <0 60 0x4>;
+ dr_mode = "host";
+ snps,quirk-frame-length-adjustment = <0x20>;
+ snps,dis_rxdet_inp3_quirk;
+ };
+
sata: sata@3200000 {
compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
reg = <0x0 0x3200000 0x0 0x10000>,
@@ -454,5 +463,13 @@
dma-coherent;
status = "disabled";
};
+
+ usb1: usb2@8600000 {
+ compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
+ reg = <0x0 0x8600000 0x0 0x1000>;
+ interrupts = <0 139 0x4>;
+ dr_mode = "host";
+ phy_type = "ulpi";
+ };
};
};
--
2.1.0.27.g96db324
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^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH v2] arm64: dts: ls1012a: add USB host controller nodes
2017-07-14 6:49 [PATCH v2] arm64: dts: ls1012a: add USB host controller nodes Ran Wang
@ 2017-07-25 8:03 ` Shawn Guo
0 siblings, 0 replies; 2+ messages in thread
From: Shawn Guo @ 2017-07-25 8:03 UTC (permalink / raw)
To: Ran Wang
Cc: Rob Herring, Mark Rutland, Catalin Marinas, Will Deacon,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
Mihai Bantea, Horia Geantă, Marc Zyngier, Liu Gang,
open list, Scott Wood, Tang Yuantian, York Sun,
moderated list:ARM64 PORT (AARCH64 ARCHITECTURE)
On Fri, Jul 14, 2017 at 02:49:09PM +0800, Ran Wang wrote:
> LS1012A has one USB 3.0(DWC3) controller and
> one USB 2.0 controller.
>
> Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Applied, thanks.
^ permalink raw reply [flat|nested] 2+ messages in thread
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