* [PATCH 1/3] dt-bindings: add "reduced-width" property for Armada XP SDRAM controller
[not found] ` <20170806223006.14231-1-chris.packham-6g8wRflRTwXFdCa3tKVlE6U/zSkkHjvu@public.gmane.org>
@ 2017-08-06 22:30 ` Chris Packham
0 siblings, 0 replies; 2+ messages in thread
From: Chris Packham @ 2017-08-06 22:30 UTC (permalink / raw)
To: robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8,
bp-Gina5bIWoIWzQB+pC5nmwQ, jlu-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: Chris Packham, Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
Some SoC implementations that use this controller have a reduced pin
count so the meaning of "full" and "half" with change.
Signed-off-by: Chris Packham <chris.packham-6g8wRflRTwXFdCa3tKVlE6U/zSkkHjvu@public.gmane.org>
---
.../bindings/memory-controllers/mvebu-sdram-controller.txt | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
index 89657d1d4cd4..3041868321c8 100644
--- a/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/mvebu-sdram-controller.txt
@@ -13,6 +13,12 @@ Required properties:
- reg: a resource specifier for the register space, which should
include all SDRAM controller registers as per the datasheet.
+Optional properties:
+ - marvell,reduced-width: some SoCs that use this SDRAM controller have
+ a reduced pin count. On such systems "full" width is 32-bits and
+ "half" width is 16-bits. Set this property to indicate that the SoC
+ used is such a system.
+
Example:
sdramc@1400 {
--
2.13.0
--
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^ permalink raw reply related [flat|nested] 2+ messages in thread
* [PATCH 2/3] ARM: dts: mvebu: set reduced-width property for SDRAM on 98dx3236
[not found] <20170806223006.14231-1-chris.packham@alliedtelesis.co.nz>
[not found] ` <20170806223006.14231-1-chris.packham-6g8wRflRTwXFdCa3tKVlE6U/zSkkHjvu@public.gmane.org>
@ 2017-08-06 22:30 ` Chris Packham
1 sibling, 0 replies; 2+ messages in thread
From: Chris Packham @ 2017-08-06 22:30 UTC (permalink / raw)
To: robh+dt, gregory.clement, bp, jlu
Cc: Chris Packham, Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
Mark Rutland, Russell King, linux-arm-kernel, devicetree,
linux-kernel
Because the 98dx3236 and similar SoCs are switch chips with integrated
CPUs they use a reduced pin count for the SDRAM interface. As such
"full" with is 32-bits and "half" width is 16-bits (as opposed to 64/32
on the discrete SoC). Set the reduced-width property on the sdramc node
to indicate this.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
---
arch/arm/boot/dts/armada-xp-98dx3236.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
index 0e12816d961e..4d6a2acc1b55 100644
--- a/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
+++ b/arch/arm/boot/dts/armada-xp-98dx3236.dtsi
@@ -129,6 +129,7 @@
sdramc@1400 {
compatible = "marvell,armada-xp-sdram-controller";
reg = <0x1400 0x500>;
+ marvell,reduced-width;
};
L2: l2-cache@8000 {
--
2.13.0
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2017-08-06 22:30 ` [PATCH 1/3] dt-bindings: add "reduced-width" property for Armada XP SDRAM controller Chris Packham
2017-08-06 22:30 ` [PATCH 2/3] ARM: dts: mvebu: set reduced-width property for SDRAM on 98dx3236 Chris Packham
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