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* [PATCH v3 0/4] PCI: rockchip: Move PCIE_WAKE handling into rockchip pcie driver
@ 2017-08-18  8:28 Jeffy Chen
       [not found] ` <20170818082841.22335-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
  2017-08-18  8:28 ` [PATCH v3 4/4] arm64: dts: rockchip: Handle pcie wake in pcie driver for Gru Jeffy Chen
  0 siblings, 2 replies; 3+ messages in thread
From: Jeffy Chen @ 2017-08-18  8:28 UTC (permalink / raw)
  To: linux-kernel, bhelgaas
  Cc: shawn.lin, briannorris, dianders, Jeffy Chen, Matthias Kaehlcke,
	devicetree, Will Deacon, Heiko Stuebner, linux-pci, Klaus Goger,
	linux-rockchip, Rob Herring, Mark Rutland, Caesar Wang,
	Catalin Marinas, linux-arm-kernel


Currently we are handling pcie wake in mrvl wifi driver. But Brian
suggests to move it into rockchip pcie driver.

Tested on my chromebook bob(with cros 4.4 kernel and mrvl wifi).


Changes in v3:
Fix error handling

Changes in v2:
Use dev_pm_set_dedicated_wake_irq
        -- Suggested by Brian Norris <briannorris@chromium.com>

Jeffy Chen (4):
  PCI: rockchip: Fix error handlings
  PCI: rockchip: Add support for pcie wake irq
  dt-bindings: PCI: rockchip: Add support for pcie wake irq
  arm64: dts: rockchip: Handle pcie wake in pcie driver for Gru

 .../devicetree/bindings/pci/rockchip-pcie.txt      |  20 ++--
 arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi       |  15 ++-
 drivers/pci/host/pcie-rockchip.c                   | 122 +++++++++++++--------
 3 files changed, 96 insertions(+), 61 deletions(-)

-- 
2.11.0

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [PATCH v3 3/4] dt-bindings: PCI: rockchip: Add support for pcie wake irq
       [not found] ` <20170818082841.22335-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
@ 2017-08-18  8:28   ` Jeffy Chen
  0 siblings, 0 replies; 3+ messages in thread
From: Jeffy Chen @ 2017-08-18  8:28 UTC (permalink / raw)
  To: linux-kernel-u79uwXL29TY76Z2rM5mHXA,
	bhelgaas-hpIqsD4AKlfQT0dZR+AlfA
  Cc: shawn.lin-TNX95d0MmH7DzftRWevZcw,
	briannorris-F7+t8E8rja9g9hUCZPvPmw,
	dianders-F7+t8E8rja9g9hUCZPvPmw, Jeffy Chen,
	devicetree-u79uwXL29TY76Z2rM5mHXA, Heiko Stuebner,
	linux-pci-u79uwXL29TY76Z2rM5mHXA,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Rob Herring,
	Mark Rutland, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r

Add an optional interrupt for PCIE_WAKE pin.

Signed-off-by: Jeffy Chen <jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
---

Changes in v3: None
Changes in v2: None

 .../devicetree/bindings/pci/rockchip-pcie.txt        | 20 ++++++++++++--------
 1 file changed, 12 insertions(+), 8 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/rockchip-pcie.txt b/Documentation/devicetree/bindings/pci/rockchip-pcie.txt
index 1453a734c2f5..edd779f842fa 100644
--- a/Documentation/devicetree/bindings/pci/rockchip-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/rockchip-pcie.txt
@@ -22,10 +22,13 @@ Required properties:
 - phys: From PHY bindings: Phandle for the Generic PHY for PCIe.
 - phy-names:  MUST be "pcie-phy".
 - interrupts: Three interrupt entries must be specified.
-- interrupt-names: Must include the following names
-	- "sys"
-	- "legacy"
-	- "client"
+- interrupt-names: Include the following names
+	Required:
+		- "sys"
+		- "legacy"
+		- "client"
+	Optional:
+		- "wake"
 - resets: Must contain seven entries for each entry in reset-names.
 	   See ../reset/reset.txt for details.
 - reset-names: Must include the following names
@@ -76,10 +79,11 @@ pcie0: pcie@f8000000 {
 	clock-names = "aclk", "aclk-perf",
 		      "hclk", "pm";
 	bus-range = <0x0 0x1>;
-	interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
-		     <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
-		     <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>;
-	interrupt-names = "sys", "legacy", "client";
+	interrupts-extended = <&gic GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
+			      <&gic GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
+			      <&gic GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>,
+			      <&gpio0 8 IRQ_TYPE_LEVEL_LOW>;
+	interrupt-names = "sys", "legacy", "client", "wake";
 	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
 	assigned-clock-rates = <100000000>;
-- 
2.11.0


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^ permalink raw reply related	[flat|nested] 3+ messages in thread

* [PATCH v3 4/4] arm64: dts: rockchip: Handle pcie wake in pcie driver for Gru
  2017-08-18  8:28 [PATCH v3 0/4] PCI: rockchip: Move PCIE_WAKE handling into rockchip pcie driver Jeffy Chen
       [not found] ` <20170818082841.22335-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
@ 2017-08-18  8:28 ` Jeffy Chen
  1 sibling, 0 replies; 3+ messages in thread
From: Jeffy Chen @ 2017-08-18  8:28 UTC (permalink / raw)
  To: linux-kernel, bhelgaas
  Cc: shawn.lin, briannorris, dianders, Jeffy Chen, Matthias Kaehlcke,
	devicetree, Heiko Stuebner, Klaus Goger, linux-rockchip,
	Rob Herring, linux-arm-kernel, Will Deacon, Mark Rutland,
	Caesar Wang, Catalin Marinas

Currently we are handling pcie wake irq in mrvl wifi driver.
Move it to rockchip pcie driver for Gru boards.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
---

Changes in v3: None
Changes in v2: None

 arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
index d48e98b62d09..42158512e979 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
@@ -712,7 +712,15 @@ ap_i2c_audio: &i2c8 {
 
 	ep-gpios = <&gpio2 27 GPIO_ACTIVE_HIGH>;
 	pinctrl-names = "default";
-	pinctrl-0 = <&pcie_clkreqn_cpm>, <&wifi_perst_l>;
+	pinctrl-0 = <&pcie_clkreqn_cpm>, <&wlan_host_wake_l>, <&wifi_perst_l>;
+
+	interrupts-extended = <&gic GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH 0>,
+			      <&gic GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH 0>,
+			      <&gic GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH 0>,
+			      <&gpio0 8 IRQ_TYPE_LEVEL_LOW>;
+	interrupt-names = "sys", "legacy", "client", "wake";
+	/delete-property/ interrupts;
+
 	vpcie3v3-supply = <&pp3300_wifi_bt>;
 	vpcie1v8-supply = <&wlan_pd_n>; /* HACK: see &wlan_pd_n */
 	vpcie0v9-supply = <&pp900_pcie>;
@@ -727,11 +735,6 @@ ap_i2c_audio: &i2c8 {
 			compatible = "pci1b4b,2b42";
 			reg = <0x83010000 0x0 0x00000000 0x0 0x00100000
 			       0x83010000 0x0 0x00100000 0x0 0x00100000>;
-			interrupt-parent = <&gpio0>;
-			interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
-			pinctrl-names = "default";
-			pinctrl-0 = <&wlan_host_wake_l>;
-			wakeup-source;
 		};
 	};
 };
-- 
2.11.0

^ permalink raw reply related	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2017-08-18  8:28 UTC | newest]

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2017-08-18  8:28 [PATCH v3 0/4] PCI: rockchip: Move PCIE_WAKE handling into rockchip pcie driver Jeffy Chen
     [not found] ` <20170818082841.22335-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-08-18  8:28   ` [PATCH v3 3/4] dt-bindings: PCI: rockchip: Add support for pcie wake irq Jeffy Chen
2017-08-18  8:28 ` [PATCH v3 4/4] arm64: dts: rockchip: Handle pcie wake in pcie driver for Gru Jeffy Chen

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