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From: "Stefan Brüns" <stefan.bruens@rwth-aachen.de>
To: linux-sunxi@googlegroups.com
Cc: devicetree@vger.kernel.org, dmaengine@vger.kernel.org,
	Vinod Koul <vinod.koul@intel.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org,
	Maxime Ripard <maxime.ripard@free-electrons.com>,
	Chen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,
	Code Kipper <codekipper@gmail.com>,
	Andre Przywara <andre.przywara@arm.com>
Subject: [PATCH 07/10] dmaengine: sun6i: Retrieve channel count/max request from devicetree
Date: Mon, 4 Sep 2017 00:40:58 +0200	[thread overview]
Message-ID: <20170903224100.17893-8-stefan.bruens@rwth-aachen.de> (raw)
In-Reply-To: <20170903224100.17893-1-stefan.bruens@rwth-aachen.de>

To avoid introduction of a new compatible for each small SoC/DMA controller
variation, move the definition of the channel count to the devicetree.

The number of vchans is no longer explicit, but limited by the highest
port/DMA request number. The result is a slight overallocation for SoCs
with a sparse port mapping.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
---
 drivers/dma/sun6i-dma.c | 35 ++++++++++++++++++++++++++++++++++-
 1 file changed, 34 insertions(+), 1 deletion(-)

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index c69dadb853d2..bd4c2e4a759b 100644
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -42,6 +42,9 @@
 
 #define DMA_STAT		0x30
 
+/* Offset between DMA_IRQ_EN and DMA_IRQ_STAT limits number of channels */
+#define DMA_MAX_CHANNELS	(DMA_IRQ_CHAN_NR * 0x10 / 4)
+
 /*
  * sun8i specific registers
  */
@@ -65,7 +68,8 @@
 #define DMA_CHAN_LLI_ADDR	0x08
 
 #define DMA_CHAN_CUR_CFG	0x0c
-#define DMA_CHAN_CFG_SRC_DRQ(x)		((x) & 0x1f)
+#define DMA_CHAN_MAX_DRQ		0x1f
+#define DMA_CHAN_CFG_SRC_DRQ(x)		((x) & DMA_CHAN_MAX_DRQ)
 #define DMA_CHAN_CFG_SRC_IO_MODE	BIT(5)
 #define DMA_CHAN_CFG_SRC_LINEAR_MODE	(0 << 5)
 #define DMA_CHAN_CFG_SRC_BURST_A31(x)	(((x) & 0x3) << 7)
@@ -1173,6 +1177,35 @@ static int sun6i_dma_probe(struct platform_device *pdev)
 	sdc->num_vchans = sdc->cfg->nr_max_vchans;
 	sdc->max_request = sdc->cfg->nr_max_requests;
 
+	ret = of_property_read_u32(np, "dma-channels", &sdc->num_pchans);
+	if (ret && !sdc->num_pchans) {
+		dev_err(&pdev->dev, "Can't get dma-channels.\n");
+		return ret;
+	}
+
+	if (sdc->num_pchans > DMA_MAX_CHANNELS) {
+		dev_err(&pdev->dev, "Number of dma-channels out of range.\n");
+		return -EINVAL;
+	}
+
+	ret = of_property_read_u32(np, "dma-requests", &sdc->max_request);
+	if (ret && !sdc->max_request) {
+		dev_info(&pdev->dev, "Missing dma-requests, using %u.\n",
+			 DMA_CHAN_MAX_DRQ);
+	}
+
+	if (sdc->max_request > DMA_CHAN_MAX_DRQ) {
+		dev_err(&pdev->dev, "Value of dma-requests out of range.\n");
+		return -EINVAL;
+	}
+
+	/*
+	 * If the number of vchans is not specified, derive it from the
+	 * highest port number, at most one channel per port and direction.
+	 */
+	if (!sdc->num_vchans)
+		sdc->num_vchans = 2 * (sdc->max_request + 1);
+
 	sdc->pchans = devm_kcalloc(&pdev->dev, sdc->num_pchans,
 				   sizeof(struct sun6i_pchan), GFP_KERNEL);
 	if (!sdc->pchans)
-- 
2.14.1

  parent reply	other threads:[~2017-09-03 22:40 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-09-03 22:40 [PATCH 00/10] dmaengine: sun6i: Fixes for H3/A83T, enable A64 Stefan Brüns
2017-09-03 22:40 ` [PATCH 02/10] dmaengine: sun6i: Correct burst length field offsets for H3 Stefan Brüns
     [not found]   ` <20170903224100.17893-3-stefan.bruens-vA1bhqPz9FBZXbeN9DUtxg@public.gmane.org>
2017-09-04  7:59     ` Maxime Ripard
2017-09-04 14:47       ` Brüns, Stefan
2017-09-03 22:40 ` Stefan Brüns [this message]
     [not found]   ` <20170903224100.17893-8-stefan.bruens-vA1bhqPz9FBZXbeN9DUtxg@public.gmane.org>
2017-09-03 23:44     ` [PATCH 07/10] dmaengine: sun6i: Retrieve channel count/max request from devicetree André Przywara
     [not found]       ` <d211b11c-09f6-8a69-2560-6be89f3b9c3c-5wv7dgnIgG8@public.gmane.org>
2017-09-04  0:12         ` Stefan Bruens
     [not found] ` <20170903224100.17893-1-stefan.bruens-vA1bhqPz9FBZXbeN9DUtxg@public.gmane.org>
2017-09-03 22:40   ` [PATCH 01/10] dmaengine: sun6i: Correct setting of clock autogating register for A83T/H3 Stefan Brüns
2017-09-03 23:23     ` André Przywara
     [not found]       ` <b88769ec-a42d-6b8e-d211-8f1cea139254-5wv7dgnIgG8@public.gmane.org>
2017-09-04  7:06         ` Maxime Ripard
2017-09-03 22:40   ` [PATCH 03/10] dmaengine: sun6i: Restructure code to allow extension for new SoCs Stefan Brüns
2017-09-03 22:40   ` [PATCH 04/10] dmaengine: sun6i: Enable additional burst lengths/widths on H3 Stefan Brüns
     [not found]     ` <20170903224100.17893-5-stefan.bruens-vA1bhqPz9FBZXbeN9DUtxg@public.gmane.org>
2017-09-04  8:00       ` Maxime Ripard
2017-09-03 22:40   ` [PATCH 05/10] dmaengine: sun6i: Move number of pchans/vchans/request to device struct Stefan Brüns
     [not found]     ` <20170903224100.17893-6-stefan.bruens-vA1bhqPz9FBZXbeN9DUtxg@public.gmane.org>
2017-09-04  7:43       ` Maxime Ripard
2017-09-04 14:30         ` Brüns, Stefan
2017-09-08 14:37           ` Maxime Ripard
2017-09-03 22:40   ` [PATCH 06/10] arm64: allwinner: a64: Add devicetree binding for DMA controller Stefan Brüns
2017-09-12 16:52     ` Rob Herring
2017-09-03 22:40   ` [PATCH 08/10] dmaengine: sun6i: Add support for Allwinner A64 and compatibles Stefan Brüns
     [not found]     ` <20170903224100.17893-9-stefan.bruens-vA1bhqPz9FBZXbeN9DUtxg@public.gmane.org>
2017-09-03 23:37       ` André Przywara
     [not found]         ` <1526a6b4-1962-256d-1ada-ef9c7d95e6b1-5wv7dgnIgG8@public.gmane.org>
2017-09-04  0:13           ` Stefan Bruens
2017-09-03 22:41 ` [PATCH 09/10] arm64: allwinner: a64: Add device node for DMA controller Stefan Brüns

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