From: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
To: Jean-Philippe Brucker
<jean-philippe.brucker-5wv7dgnIgG8@public.gmane.org>
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org,
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lenb-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org
Subject: Re: [RFC PATCH 6/6] iommu/arm-smmu-v3: Avoid ILLEGAL setting of STE.S1STALLD and CD.S
Date: Wed, 13 Sep 2017 04:06:44 +0100 [thread overview]
Message-ID: <20170913030643.GD12411@arm.com> (raw)
In-Reply-To: <738977bb-4cd7-7d86-0ea0-0c88b6af721c-5wv7dgnIgG8@public.gmane.org>
On Tue, Sep 05, 2017 at 01:54:19PM +0100, Jean-Philippe Brucker wrote:
> On 31/08/17 09:20, Yisheng Xie wrote:
> > It is ILLEGAL to set STE.S1STALLD if STALL_MODEL is not 0b00, which
> > means we should not disable stall mode if stall/terminate mode is not
> > configuable.
> >
> > Meanwhile, it is also ILLEGAL when STALL_MODEL==0b10 && CD.S==0 which
> > means if stall mode is force we should always set CD.S.
> >
> > This patch add ARM_SMMU_FEAT_TERMINATE feature bit for smmu, and use
> > TERMINATE feature checking to ensue above ILLEGAL cases from happening.
> >
> > Signed-off-by: Yisheng Xie <xieyisheng1-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
> > ---
> > drivers/iommu/arm-smmu-v3.c | 22 ++++++++++++++++------
> > 1 file changed, 16 insertions(+), 6 deletions(-)
> >
> > diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
> > index dbda2eb..0745522 100644
> > --- a/drivers/iommu/arm-smmu-v3.c
> > +++ b/drivers/iommu/arm-smmu-v3.c
> > @@ -55,6 +55,7 @@
> > #define IDR0_STALL_MODEL_SHIFT 24
> > #define IDR0_STALL_MODEL_MASK 0x3
> > #define IDR0_STALL_MODEL_STALL (0 << IDR0_STALL_MODEL_SHIFT)
> > +#define IDR0_STALL_MODEL_NS (1 << IDR0_STALL_MODEL_SHIFT)
> > #define IDR0_STALL_MODEL_FORCE (2 << IDR0_STALL_MODEL_SHIFT)
> > #define IDR0_TTENDIAN_SHIFT 21
> > #define IDR0_TTENDIAN_MASK 0x3
> > @@ -766,6 +767,7 @@ struct arm_smmu_device {
> > #define ARM_SMMU_FEAT_SVM (1 << 15)
> > #define ARM_SMMU_FEAT_HA (1 << 16)
> > #define ARM_SMMU_FEAT_HD (1 << 17)
> > +#define ARM_SMMU_FEAT_TERMINATE (1 << 18)
>
> I'd rather introduce something like "ARM_SMMU_FEAT_STALL_FORCE" instead.
> Terminate model has another meaning, and is defined by a different bit in
> IDR0.
Yes. What we need to do is:
- If STALL_MODEL is 0b00, then set S1STALLD
- If STALL_MODEL is 0b01, then we're ok (in future, avoiding trying to use
stalls, even for masters that claim to support it)
- If STALL_MODEL is 0b10, then force all PCI devices and any platform
devices that don't claim to support stalls into bypass (depending on
disable_bypass).
Reasonable? We could actually knock up a fix for mainline to do most of
this already.
Will
next prev parent reply other threads:[~2017-09-13 3:06 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-08-31 8:20 [RFC PATCH 0/6] Add platform device SVM support for ARM SMMUv3 Yisheng Xie
2017-08-31 8:20 ` [RFC PATCH 1/6] dt-bindings: document stall and PASID properties for IOMMU masters Yisheng Xie
[not found] ` <1504167642-14922-2-git-send-email-xieyisheng1-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-05 12:52 ` Jean-Philippe Brucker
2017-08-31 8:20 ` [RFC PATCH 3/6] ACPI: IORT: Add stall and pasid properties to iommu_fwspec Yisheng Xie
[not found] ` <1504167642-14922-1-git-send-email-xieyisheng1-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-08-31 8:20 ` [RFC PATCH 2/6] iommu/of: " Yisheng Xie
[not found] ` <1504167642-14922-3-git-send-email-xieyisheng1-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-05 12:52 ` Jean-Philippe Brucker
2017-08-31 8:20 ` [RFC PATCH 4/6] iommu/arm-smmu-v3: Add SVM support for platform devices Yisheng Xie
[not found] ` <1504167642-14922-5-git-send-email-xieyisheng1-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-05 12:53 ` Jean-Philippe Brucker
2017-09-06 0:51 ` Bob Liu
2017-09-06 1:20 ` Yisheng Xie
2017-08-31 8:20 ` [RFC PATCH 5/6] iommu/arm-smmu-v3: fix panic when handle stall mode irq Yisheng Xie
2017-09-05 12:53 ` Jean-Philippe Brucker
2017-08-31 8:20 ` [RFC PATCH 6/6] iommu/arm-smmu-v3: Avoid ILLEGAL setting of STE.S1STALLD and CD.S Yisheng Xie
[not found] ` <1504167642-14922-7-git-send-email-xieyisheng1-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-05 12:54 ` Jean-Philippe Brucker
2017-09-06 2:23 ` Yisheng Xie
[not found] ` <738977bb-4cd7-7d86-0ea0-0c88b6af721c-5wv7dgnIgG8@public.gmane.org>
2017-09-13 3:06 ` Will Deacon [this message]
2017-09-13 10:11 ` Yisheng Xie
[not found] ` <2f952821-afc3-46dd-17eb-40e8626bd6e5-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-13 15:47 ` Jean-Philippe Brucker
2017-09-13 17:11 ` Will Deacon
2017-09-05 12:56 ` [RFC PATCH 0/6] Add platform device SVM support for ARM SMMUv3 Jean-Philippe Brucker
[not found] ` <95d1a9e2-1816-ff7d-9a8d-98406a6c2c22-5wv7dgnIgG8@public.gmane.org>
2017-09-06 1:02 ` Bob Liu
2017-09-06 9:57 ` Jean-Philippe Brucker
[not found] ` <2874a1f3-22f1-20d4-4009-50add127a10f-5wv7dgnIgG8@public.gmane.org>
2017-09-07 1:41 ` Bob Liu
[not found] ` <1d358989-48bb-ccde-d7d9-36e004bc2d78-hv44wF8Li93QT0dZR+AlfA@public.gmane.org>
2017-09-07 16:32 ` Jean-Philippe Brucker
2017-09-13 1:11 ` Bob Liu
2017-09-06 1:16 ` Yisheng Xie
2017-09-06 9:59 ` Jean-Philippe Brucker
[not found] ` <fd4200c1-3c89-23f1-a2b1-6457ef8475c1-5wv7dgnIgG8@public.gmane.org>
2017-09-07 1:55 ` Bob Liu
2017-09-07 16:30 ` Jean-Philippe Brucker
2017-09-06 1:24 ` Hanjun Guo
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