From: Boris Brezillon <boris.brezillon@free-electrons.com>
To: Tomi Valkeinen <tomi.valkeinen@ti.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, Cyprian Wronka <cwronka@cadence.com>,
Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Simon Hatliff <hatliff@cadence.com>,
dri-devel@lists.freedesktop.org,
Richard Sproul <sproul@cadence.com>,
Alan Douglas <adouglas@cadence.com>,
Rob Herring <robh+dt@kernel.org>, Jyri Sarha <jsarha@ti.com>,
Kumar Gala <galak@codeaurora.org>,
Maxime Ripard <maxime.ripard@free-electrons.com>,
Thomas Petazzoni <thomas.petazzoni@free-electrons.com>,
Neil Webb <neilw@cadence.com>
Subject: Re: [PATCH v3 1/2] drm/bridge: Add Cadence DSI driver
Date: Tue, 19 Sep 2017 15:25:33 +0200 [thread overview]
Message-ID: <20170919152533.78fb2b3e@bbrezillon> (raw)
In-Reply-To: <70f446c1-64d8-928c-4ea7-aa16dda12253@ti.com>
On Tue, 19 Sep 2017 15:59:20 +0300
Tomi Valkeinen <tomi.valkeinen@ti.com> wrote:
> Hi Boris,
>
>
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
>
> On 31/08/17 18:55, Boris Brezillon wrote:
> > Add a driver for Cadence DPI -> DSI bridge.
> >
> > This driver only support a subset of Cadence DSI bridge capabilities.
> >
> > Here is a non-exhaustive list of missing features:
> > * burst mode
> > * dynamic configuration of the DPHY based on the
> > * support for additional input interfaces (SDI input)
> >
> > Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
>
> <snip>
>
> > + dsi->pclk = devm_clk_get(&pdev->dev, "pclk");
> > + if (IS_ERR(dsi->pclk))
> > + return PTR_ERR(dsi->pclk);
>
> What's the purpose of pclk? Isn't that normally dealt with the normal
> modesetting, enabled with the video stream? How could it even be enabled
> here, without anyone setting the rate?
It's the peripheral clock, not the pixel clock, and AFAIU it has to be
enabled before accessing DSI registers.
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next prev parent reply other threads:[~2017-09-19 13:25 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20170831155543epcas2p3003246c8d124c032c513a5fed2792992@epcas2p3.samsung.com>
2017-08-31 15:55 ` [PATCH v3 1/2] drm/bridge: Add Cadence DSI driver Boris Brezillon
2017-08-31 15:55 ` [PATCH v3 2/2] dt-bindings: drm/bridge: Document Cadence DSI bridge bindings Boris Brezillon
[not found] ` <20170831155519.3704-2-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-09-01 6:28 ` Andrzej Hajda
[not found] ` <3371dbd2-9539-d746-0982-71112d5d98a0-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2017-09-01 7:06 ` Boris Brezillon
2017-09-01 7:26 ` Andrzej Hajda
2017-09-12 16:03 ` Rob Herring
[not found] ` <20170831155519.3704-1-boris.brezillon-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-08-31 17:03 ` [PATCH v3 1/2] drm/bridge: Add Cadence DSI driver Eric Anholt
2017-09-01 6:20 ` Boris Brezillon
2017-09-01 18:32 ` Eric Anholt
2017-09-01 7:51 ` Andrzej Hajda
[not found] ` <6404fb07-9c42-78bf-f76e-e7aa1abf5549-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2017-09-01 8:09 ` Boris Brezillon
2017-09-07 9:36 ` Archit Taneja
2017-09-18 9:06 ` Boris Brezillon
[not found] ` <c17e158a-3e37-8ae6-e31c-7ed89429166a-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2017-10-11 9:26 ` Boris Brezillon
2017-10-11 10:13 ` Archit Taneja
2017-09-19 12:59 ` Tomi Valkeinen
2017-09-19 13:25 ` Boris Brezillon [this message]
2017-09-19 13:38 ` Tomi Valkeinen
2017-09-19 13:48 ` Boris Brezillon
2017-09-19 14:25 ` Tomi Valkeinen
[not found] ` <6cbad342-aac8-d0d4-1d82-26aef33f0e82-l0cyMroinI0@public.gmane.org>
2017-09-20 12:08 ` Boris Brezillon
2017-09-20 11:55 ` Tomi Valkeinen
[not found] ` <27834b62-664f-d403-6396-2339cb4fda1c-l0cyMroinI0@public.gmane.org>
2017-09-20 12:32 ` Boris Brezillon
2017-09-20 12:42 ` Tomi Valkeinen
2017-09-20 12:59 ` Boris Brezillon
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