[PATCH v2] arm: sun8i: nanopi-neo: Enable USB OTG

[PATCH v2] arm: sun8i: nanopi-neo: Enable USB OTG

[David Disseldorp]

From: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>

The NanoPi NEO features a MicroUSB port that can work in both host mode
and peripheral mode. Switching is handled via GPIO PG12.

Signed-off-by: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>
---
Changes since v1
- remove duplicate ehci3/ohci3 definitions, which are already carried in
  sun8i-h3-nanopi.dtsi

 arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
index 78f6c24952dd..17b07c3df369 100644
--- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
+++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
@@ -47,9 +47,28 @@
 	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
 };
 
+&ehci0 {
+	status = "okay";
+};
+
 &emac {
 	phy-handle = <&int_mii_phy>;
 	phy-mode = "mii";
 	allwinner,leds-active-low;
 	status = "okay";
 };
+
+&ohci0 {
+	status = "okay";
+};
+
+&usb_otg {
+	dr_mode = "otg";
+	status = "okay";
+};
+
+&usbphy {
+	/* USB Type-A port's VBUS is always on */
+	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+	status = "okay";
+};
-- 
2.13.5

--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCH v2] arm: sun8i: nanopi-neo: Enable USB OTG

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 1683 bytes --]

On Wed, Sep 20, 2017 at 04:39:23AM +0000, David Disseldorp wrote:
> From: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>
> 
> The NanoPi NEO features a MicroUSB port that can work in both host mode
> and peripheral mode. Switching is handled via GPIO PG12.
> 
> Signed-off-by: David Disseldorp <ddiss-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org>
> ---
> Changes since v1
> - remove duplicate ehci3/ohci3 definitions, which are already carried in
>   sun8i-h3-nanopi.dtsi
> 
>  arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 19 +++++++++++++++++++
>  1 file changed, 19 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> index 78f6c24952dd..17b07c3df369 100644
> --- a/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> +++ b/arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts
> @@ -47,9 +47,28 @@
>  	compatible = "friendlyarm,nanopi-neo", "allwinner,sun8i-h3";
>  };
>  
> +&ehci0 {
> +	status = "okay";
> +};
> +
>  &emac {
>  	phy-handle = <&int_mii_phy>;
>  	phy-mode = "mii";
>  	allwinner,leds-active-low;
>  	status = "okay";
>  };
> +
> +&ohci0 {
> +	status = "okay";
> +};
> +
> +&usb_otg {
> +	dr_mode = "otg";
> +	status = "okay";
> +};
> +
> +&usbphy {
> +	/* USB Type-A port's VBUS is always on */

I'm not sure what that comment is here for.

> +	usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */

And that means that you cannot switch VBUS on on the board?

In this case, it's not able to do proper OTG like advertised above.

Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 801 bytes --]