From: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
To: robh+dt@kernel.org, mark.rutland@arm.com, ralf@linux-mips.org,
mturquette@baylibre.com, sboyd@codeaurora.org,
devicetree@vger.kernel.org, linux-mips@linux-mips.org,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
paul@crapouillou.net, malat@debian.org, dom.peklo@gmail.com
Cc: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Subject: [RFC 1/4] dt-bindings: Add Ingenic X1000 SoC clock define
Date: Wed, 27 Sep 2017 20:45:24 +0530 [thread overview]
Message-ID: <20170927151527.25570-2-prasannatsmkumar@gmail.com> (raw)
In-Reply-To: <20170927151527.25570-1-prasannatsmkumar@gmail.com>
Ingenic X1000 SoC has different set of peripherals than JZ4780 and
JZ4740. Add a new device tree binding for the clock.
Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
---
include/dt-bindings/clock/x1000-cgu.h | 46 +++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
create mode 100644 include/dt-bindings/clock/x1000-cgu.h
diff --git a/include/dt-bindings/clock/x1000-cgu.h b/include/dt-bindings/clock/x1000-cgu.h
new file mode 100644
index 0000000..17f05bc
--- /dev/null
+++ b/include/dt-bindings/clock/x1000-cgu.h
@@ -0,0 +1,46 @@
+/*
+ * Copyright (C) 2016 PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_X1000_CGU_H__
+#define __DT_BINDINGS_CLOCK_X1000_CGU_H__
+
+/* Add details for other peripherals when their support is added */
+#define X1000_CLK_EXCLK 0
+#define X1000_CLK_RTCLK (X1000_CLK_EXCLK + 1)
+#define X1000_CLK_APLL (X1000_CLK_RTCLK + 1)
+#define X1000_CLK_MPLL (X1000_CLK_APLL + 1)
+
+#define X1000_CLK_SCLKA (X1000_CLK_MPLL + 1)
+#define X1000_CLK_CPUMUX (X1000_CLK_SCLKA + 1)
+#define X1000_CLK_CPU (X1000_CLK_CPUMUX + 1)
+#define X1000_CLK_L2CACHE (X1000_CLK_CPU + 1)
+#define X1000_CLK_AHB0 (X1000_CLK_L2CACHE + 1)
+#define X1000_CLK_AHB2PMUX (X1000_CLK_AHB0 + 1)
+#define X1000_CLK_AHB2 (X1000_CLK_AHB2PMUX + 1)
+#define X1000_CLK_PCLK (X1000_CLK_AHB2 + 1)
+#define X1000_CLK_DDR (X1000_CLK_PCLK + 1)
+#define X1000_CLK_MSCMUX (X1000_CLK_DDR + 1)
+#define X1000_CLK_MSC0 (X1000_CLK_MSCMUX + 1)
+#define X1000_CLK_MSC1 (X1000_CLK_MSC0 + 1)
+#define X1000_CLK_CIMMCLK (X1000_CLK_MSC1 + 1)
+#define X1000_CLK_PCMPLL (X1000_CLK_CIMMCLK + 1)
+#define X1000_CLK_PCM (X1000_CLK_PCMPLL + 1)
+#define X1000_CLK_NEMC (X1000_CLK_PCM + 1)
+#define X1000_CLK_UART0 (X1000_CLK_NEMC + 1)
+#define X1000_CLK_UART1 (X1000_CLK_UART0 + 1)
+#define X1000_CLK_UART2 (X1000_CLK_UART1 + 1)
+#define X1000_CLK_PDMA (X1000_CLK_UART2 + 1)
+#define X1000_CLK_CIM (X1000_CLK_PDMA + 1)
+#define X1000_CLK_DDR0 (X1000_CLK_CIM + 1)
+#define X1000_CLK_DDR1 (X1000_CLK_DDR0 + 1)
+#define X1000_CLK_CORE1 (X1000_CLK_DDR1 + 1)
+
+#define X1000_CLK_I2SPLL (X1000_CLK_CORE1 + 1)
+#define X1000_CLK_I2S (X1000_CLK_I2SPLL + 1)
+
+#endif /* __DT_BINDINGS_CLOCK_X1000_CGU_H__ */
--
2.10.0
next prev parent reply other threads:[~2017-09-27 15:15 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-27 15:15 [RFC 0/4] Add Ingenic X1000 SoC Support PrasannaKumar Muralidharan
2017-09-27 15:15 ` PrasannaKumar Muralidharan [this message]
2017-09-27 15:15 ` [RFC 2/4] clk: Add Ingenic X1000 CGU driver PrasannaKumar Muralidharan
2017-10-25 9:23 ` Stephen Boyd
2017-09-27 15:15 ` [RFC 3/4] MIPS: Ingenic: Initial X1000 SoC support PrasannaKumar Muralidharan
2018-03-06 0:08 ` James Hogan
2018-03-07 13:44 ` PrasannaKumar Muralidharan
2018-03-07 14:19 ` Jiaxun Yang
2018-03-07 15:21 ` PrasannaKumar Muralidharan
2018-03-07 14:35 ` James Hogan
2018-03-07 15:05 ` PrasannaKumar Muralidharan
2018-03-07 15:10 ` James Hogan
2018-03-07 15:22 ` PrasannaKumar Muralidharan
2018-03-07 15:52 ` Jiaxun Yang
2018-03-07 16:25 ` PrasannaKumar Muralidharan
2018-03-07 18:13 ` Mathieu Malaterre
2018-03-10 19:05 ` Jiaxun Yang
2018-03-09 0:52 ` Jiaxun Yang
2017-09-27 15:15 ` [RFC 4/4] MIPS: Ingenic: Add Halley2 development board support PrasannaKumar Muralidharan
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20170927151527.25570-2-prasannatsmkumar@gmail.com \
--to=prasannatsmkumar@gmail.com \
--cc=devicetree@vger.kernel.org \
--cc=dom.peklo@gmail.com \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mips@linux-mips.org \
--cc=malat@debian.org \
--cc=mark.rutland@arm.com \
--cc=mturquette@baylibre.com \
--cc=paul@crapouillou.net \
--cc=ralf@linux-mips.org \
--cc=robh+dt@kernel.org \
--cc=sboyd@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).