From: Brian Norris <briannorris@chromium.org>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Rajat Jain <rajatja@google.com>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Frank Rowand <frowand.list@gmail.com>,
Shawn Lin <shawn.lin@rock-chips.com>,
Heiko Stuebner <heiko@sntech.de>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
Brian Norris <briannorris@chromium.org>
Subject: [PATCH 0/3] PCI: rockchip: assert PERST# in S3
Date: Thu, 12 Oct 2017 13:52:17 -0700 [thread overview]
Message-ID: <20171012205220.130048-1-briannorris@chromium.org> (raw)
Hi,
This patch series should mostly be self-descriptive, but it's motivated by the
fact that I've found differing requirements from PCIe endpoint makers regarding
the state of PERST# when in system suspend (S3). Additionally, some existing
boards are not especially well suited for holding PERST# low in S3 (e.g., the
pin is driven by a non-PMU GPIO, so it's hard or impossible to keep it
asserted). So the solution is...give it a device tree property!
Brian
Brian Norris (3):
Documentation/devicetree: Add pcie-reset-suspend property
of/pci: Add of_pci_get_pcie_reset_suspend() to parse
pcie-reset-suspend
PCI: rockchip: Support configuring PERST# state via DT
Documentation/devicetree/bindings/pci/pci.txt | 11 +++++++++++
drivers/of/of_pci.c | 25 +++++++++++++++++++++++++
drivers/pci/host/pcie-rockchip.c | 7 +++++++
include/linux/of_pci.h | 7 +++++++
4 files changed, 50 insertions(+)
--
2.15.0.rc0.271.g36b669edcc-goog
next reply other threads:[~2017-10-12 20:52 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-12 20:52 Brian Norris [this message]
2017-10-12 20:52 ` [PATCH 1/3] Documentation/devicetree: Add pcie-reset-suspend property Brian Norris
2017-10-13 16:51 ` Bjorn Helgaas
2017-10-17 23:39 ` Brian Norris
2017-10-18 0:56 ` Brian Norris
2017-10-18 16:17 ` Bjorn Helgaas
2017-10-18 20:38 ` Rob Herring
2017-10-12 20:52 ` [PATCH 2/3] of/pci: Add of_pci_get_pcie_reset_suspend() to parse pcie-reset-suspend Brian Norris
2017-10-12 20:52 ` [PATCH 3/3] PCI: rockchip: Support configuring PERST# state via DT Brian Norris
[not found] ` <20171012205220.130048-1-briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2017-10-12 22:27 ` [PATCH 0/3] PCI: rockchip: assert PERST# in S3 Doug Anderson
2017-10-13 3:15 ` Bjorn Helgaas
2017-10-13 6:27 ` Brian Norris
2017-10-14 0:06 ` Brian Norris
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171012205220.130048-1-briannorris@chromium.org \
--to=briannorris@chromium.org \
--cc=bhelgaas@google.com \
--cc=devicetree@vger.kernel.org \
--cc=frowand.list@gmail.com \
--cc=heiko@sntech.de \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=linux-rockchip@lists.infradead.org \
--cc=mark.rutland@arm.com \
--cc=rajatja@google.com \
--cc=robh+dt@kernel.org \
--cc=shawn.lin@rock-chips.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).