From: Brian Norris <briannorris@chromium.org>
To: Bjorn Helgaas <bhelgaas@google.com>
Cc: Rajat Jain <rajatja@google.com>, Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
Frank Rowand <frowand.list@gmail.com>,
Shawn Lin <shawn.lin@rock-chips.com>,
Heiko Stuebner <heiko@sntech.de>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-arm-kernel@lists.infradead.org,
Brian Norris <briannorris@chromium.org>
Subject: [PATCH 3/3] PCI: rockchip: Support configuring PERST# state via DT
Date: Thu, 12 Oct 2017 13:52:20 -0700 [thread overview]
Message-ID: <20171012205220.130048-4-briannorris@chromium.org> (raw)
In-Reply-To: <20171012205220.130048-1-briannorris@chromium.org>
I've found that different endpoints and board configurations have
required different behavior from the PCIe Reset (PERST#) signal when in
low-power system suspend (e.g., S3). Use the new of_pci helper to
request this state and assert (active low) PERST# before suspending.
Note that we reinitialize the link (including reconfiguring PERST#) at
resume time.
This requires that the board and system firmware supports driving this
signal low when the system is suspended, since PERST# may be pulled up
by the endpoint, and some GPIO banks are not active in S3.
Signed-off-by: Brian Norris <briannorris@chromium.org>
---
drivers/pci/host/pcie-rockchip.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index 9051c6c8fea4..1ab58c1abb34 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -233,6 +233,7 @@ struct rockchip_pcie {
struct regulator *vpcie1v8; /* 1.8V power supply */
struct regulator *vpcie0v9; /* 0.9V power supply */
struct gpio_desc *ep_gpio;
+ bool suspend_reset;
u32 lanes;
u8 lanes_map;
u8 root_bus_nr;
@@ -1155,6 +1156,9 @@ static int rockchip_pcie_parse_dt(struct rockchip_pcie *rockchip)
dev_info(dev, "no vpcie0v9 regulator found\n");
}
+ /* Default not-asserted, to retain backward compatibility. */
+ rockchip->suspend_reset = of_pci_get_pcie_reset_suspend(node) > 0;
+
return 0;
}
@@ -1463,6 +1467,9 @@ static int __maybe_unused rockchip_pcie_suspend_noirq(struct device *dev)
return ret;
}
+ if (rockchip->suspend_reset)
+ gpiod_set_value(rockchip->ep_gpio, 0);
+
rockchip_pcie_deinit_phys(rockchip);
rockchip_pcie_disable_clocks(rockchip);
--
2.15.0.rc0.271.g36b669edcc-goog
next prev parent reply other threads:[~2017-10-12 20:52 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-12 20:52 [PATCH 0/3] PCI: rockchip: assert PERST# in S3 Brian Norris
2017-10-12 20:52 ` [PATCH 1/3] Documentation/devicetree: Add pcie-reset-suspend property Brian Norris
2017-10-13 16:51 ` Bjorn Helgaas
2017-10-17 23:39 ` Brian Norris
2017-10-18 0:56 ` Brian Norris
2017-10-18 16:17 ` Bjorn Helgaas
2017-10-18 20:38 ` Rob Herring
2017-10-12 20:52 ` [PATCH 2/3] of/pci: Add of_pci_get_pcie_reset_suspend() to parse pcie-reset-suspend Brian Norris
2017-10-12 20:52 ` Brian Norris [this message]
[not found] ` <20171012205220.130048-1-briannorris-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2017-10-12 22:27 ` [PATCH 0/3] PCI: rockchip: assert PERST# in S3 Doug Anderson
2017-10-13 3:15 ` Bjorn Helgaas
2017-10-13 6:27 ` Brian Norris
2017-10-14 0:06 ` Brian Norris
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