From: Daniel Vetter <daniel@ffwll.ch>
To: Peter Ujfalusi <peter.ujfalusi@ti.com>
Cc: devicetree@vger.kernel.org, tomi.valkeinen@ti.com,
laurent.pinchart@ideasonboard.com,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 3/3] drm/omap: Filter displays mode based on bandwidth limit
Date: Fri, 20 Oct 2017 15:34:03 +0200 [thread overview]
Message-ID: <20171020133403.wszkmpqb6rahcfx5@phenom.ffwll.local> (raw)
In-Reply-To: <20171020131258.4092-4-peter.ujfalusi@ti.com>
On Fri, Oct 20, 2017 at 04:12:58PM +0300, Peter Ujfalusi wrote:
> If we have memory bandwidth limit configured, reject the modes which would
> require more bandwidth than the limit if it is used with one full
> resolution plane (most common use case).
>
> This filtering is not providing full protection as it is possible that
> application would pick smaller crtc resolution with high resolution planes
> and down scaling, or can enable more smaller planes where the sum of their
> bandwidth need would be higher than the limit.
Note that userspace can also just pick a mode it wants, so you need to
have a proper bw check in your atomic_check logic anyway. There's some
recent work to sprinkle ->mode_valid checks over objects to help a bit
with filling that gap, you might want to look into a crtc->mode_valid
callback for this logic at least.
-Daniel
>
> This patch only allows us to filter out modes which would need more
> bandwidth if they were used with one full screen plane.
>
> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
> ---
> drivers/gpu/drm/omapdrm/omap_connector.c | 24 ++++++++++++++++++++++++
> drivers/gpu/drm/omapdrm/omap_drv.c | 5 +++++
> drivers/gpu/drm/omapdrm/omap_drv.h | 3 +++
> 3 files changed, 32 insertions(+)
>
> diff --git a/drivers/gpu/drm/omapdrm/omap_connector.c b/drivers/gpu/drm/omapdrm/omap_connector.c
> index aa5ba9ae2191..c693d22960c8 100644
> --- a/drivers/gpu/drm/omapdrm/omap_connector.c
> +++ b/drivers/gpu/drm/omapdrm/omap_connector.c
> @@ -159,6 +159,7 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
> struct drm_display_mode *mode)
> {
> struct omap_connector *omap_connector = to_omap_connector(connector);
> + struct omap_drm_private *priv = connector->dev->dev_private;
> struct omap_dss_device *dssdev = omap_connector->dssdev;
> struct omap_dss_driver *dssdrv = dssdev->driver;
> struct videomode vm = {0};
> @@ -203,6 +204,29 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
> drm_mode_destroy(dev, new_mode);
> }
>
> + /* Check for bandwidth limit */
> + if (!r && priv->max_bandwidth) {
> + unsigned int bandwidth, real_refresh;
> +
> + /*
> + * Estimation for the bandwidth need of a given mode with one
> + * full screen plane:
> + * resolution * 32bpp * (real) refresh rate
> + */
> + real_refresh = drm_mode_vrefresh(mode);
> + if (mode->flags & DRM_MODE_FLAG_INTERLACE)
> + real_refresh /= 2;
> +
> + bandwidth = vm.hactive * vm.vactive * 4 * real_refresh;
> +
> + /*
> + * Reject modes which would need more bandwidth if used with one
> + * full resolution plane (most common use case).
> + */
> + if (priv->max_bandwidth < bandwidth)
> + ret = MODE_BAD;
> + }
> +
> DBG("connector: mode %s: "
> "%d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
> (ret == MODE_OK) ? "valid" : "invalid",
> diff --git a/drivers/gpu/drm/omapdrm/omap_drv.c b/drivers/gpu/drm/omapdrm/omap_drv.c
> index 528cf5c25bec..58b4a0e149e0 100644
> --- a/drivers/gpu/drm/omapdrm/omap_drv.c
> +++ b/drivers/gpu/drm/omapdrm/omap_drv.c
> @@ -701,6 +701,11 @@ static int pdev_probe(struct platform_device *pdev)
> spin_lock_init(&priv->list_lock);
> INIT_LIST_HEAD(&priv->obj_list);
>
> + /* Get memory bandwidth limits */
> + if (priv->dispc_ops->get_memory_bandwidth_limit)
> + priv->max_bandwidth =
> + priv->dispc_ops->get_memory_bandwidth_limit();
> +
> omap_gem_init(ddev);
>
> ret = omap_modeset_init(ddev);
> diff --git a/drivers/gpu/drm/omapdrm/omap_drv.h b/drivers/gpu/drm/omapdrm/omap_drv.h
> index cccaae787a7c..d49715272080 100644
> --- a/drivers/gpu/drm/omapdrm/omap_drv.h
> +++ b/drivers/gpu/drm/omapdrm/omap_drv.h
> @@ -86,6 +86,9 @@ struct omap_drm_private {
> spinlock_t wait_lock; /* protects the wait_list */
> struct list_head wait_list; /* list of omap_irq_wait */
> uint32_t irq_mask; /* enabled irqs in addition to wait_list */
> +
> + /* memory bandwidth limit if it is needed on the platform */
> + unsigned int max_bandwidth;
> };
>
>
> --
> Peter
>
> Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki.
> Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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prev parent reply other threads:[~2017-10-20 13:34 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-10-20 13:12 [PATCH 0/3] drm/omap: Support for dispc memory bandwidth limit Peter Ujfalusi
2017-10-20 13:12 ` [PATCH 1/3] dt-bindings: display/ti: Add optional property to set " Peter Ujfalusi
[not found] ` <20171020131258.4092-2-peter.ujfalusi-l0cyMroinI0@public.gmane.org>
2017-10-27 2:27 ` Rob Herring
2017-10-30 13:53 ` Peter Ujfalusi
[not found] ` <20171020131258.4092-1-peter.ujfalusi-l0cyMroinI0@public.gmane.org>
2017-10-20 13:12 ` [PATCH 2/3] drm/omap: dss: Add support for reporting memory bandwidth limitation Peter Ujfalusi
2017-10-20 13:12 ` [PATCH 3/3] drm/omap: Filter displays mode based on bandwidth limit Peter Ujfalusi
2017-10-20 13:34 ` Daniel Vetter [this message]
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