From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Georgi Djakov <georgi.djakov@linaro.org>
Cc: sboyd@codeaurora.org, jassisinghbrar@gmail.com,
robh+dt@kernel.org, mturquette@baylibre.com,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v9 4/7] clk: qcom: Add A53 PLL support
Date: Wed, 25 Oct 2017 21:19:23 -0700 [thread overview]
Message-ID: <20171026041923.GK1575@tuxbook> (raw)
In-Reply-To: <20170921164940.20343-5-georgi.djakov@linaro.org>
On Thu 21 Sep 09:49 PDT 2017, Georgi Djakov wrote:
> diff --git a/drivers/clk/qcom/a53-pll.c b/drivers/clk/qcom/a53-pll.c
[..]
> +
> +static const struct of_device_id qcom_a53pll_match_table[] = {
> + { .compatible = "qcom,msm8916-a53pll" },
> + { }
> +};
Move the match table below the probe.
> +
> +static int qcom_a53pll_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct regmap *regmap;
> + struct resource *res;
> + struct clk_pll *pll;
> + void __iomem *base;
> + struct clk_init_data init = { };
> + int ret;
> +
> + pll = devm_kzalloc(dev, sizeof(*pll), GFP_KERNEL);
> + if (!pll)
> + return -ENOMEM;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + base = devm_ioremap_resource(dev, res);
> + if (IS_ERR(base))
> + return PTR_ERR(base);
> +
> + regmap = devm_regmap_init_mmio(dev, base, &a53pll_regmap_config);
> + if (IS_ERR(regmap))
> + return PTR_ERR(regmap);
> +
> + pll->l_reg = 0x04;
> + pll->m_reg = 0x08;
> + pll->n_reg = 0x0c;
> + pll->config_reg = 0x14;
> + pll->mode_reg = 0x00;
> + pll->status_reg = 0x1c;
> + pll->status_bit = 16;
> + pll->freq_tbl = a53pll_freq;
> +
> + init.name = "a53pll";
> + init.parent_names = (const char *[]){ "xo" };
> + init.num_parents = 1;
> + init.ops = &clk_pll_sr2_ops;
> + init.flags = CLK_IS_CRITICAL;
> + pll->clkr.hw.init = &init;
> +
> + ret = devm_clk_register_regmap(dev, &pll->clkr);
> + if (ret) {
> + dev_err(dev, "failed to register regmap clock: %d\n", ret);
> + return ret;
> + }
> +
> + ret = of_clk_add_hw_provider(dev->of_node, of_clk_hw_simple_get,
> + &pll->clkr.hw);
> + if (ret) {
> + dev_err(dev, "failed to add clock provider: %d\n", ret);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static struct platform_driver qcom_a53pll_driver = {
> + .probe = qcom_a53pll_probe,
I think you should either have a remove here that
of_clk_del_hw_provider() or set suppress_bind_attrs in the .driver.
> + .driver = {
> + .name = "qcom-a53pll",
> + .of_match_table = qcom_a53pll_match_table,
> + },
> +};
> +
> +builtin_platform_driver(qcom_a53pll_driver);
Other than these nits I think this looks good.
Regards,
Bjorn
next prev parent reply other threads:[~2017-10-26 4:19 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-21 16:49 [PATCH v9 0/7] Add support for Qualcomm A53 CPU clock Georgi Djakov
2017-09-21 16:49 ` [PATCH v9 1/7] mailbox: qcom: Convert APCS IPC driver to use regmap Georgi Djakov
[not found] ` <20170921164940.20343-2-georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-10-26 4:41 ` Bjorn Andersson
2017-09-21 16:49 ` [PATCH v9 3/7] mailbox: qcom: Move the apcs struct into a separate header Georgi Djakov
2017-10-26 4:28 ` Bjorn Andersson
2017-10-27 14:20 ` Georgi Djakov
[not found] ` <5bad4c4b-362b-ba9f-3072-1cced7a004dd-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-11-14 2:12 ` Stephen Boyd
2017-11-14 4:47 ` Bjorn Andersson
2017-11-14 18:12 ` Stephen Boyd
[not found] ` <20170921164940.20343-1-georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2017-09-21 16:49 ` [PATCH v9 2/7] mailbox: qcom: Populate APCS child platform devices Georgi Djakov
2017-09-21 16:49 ` [PATCH v9 4/7] clk: qcom: Add A53 PLL support Georgi Djakov
2017-09-21 22:51 ` Rob Herring
2017-10-26 4:19 ` Bjorn Andersson [this message]
2017-09-21 16:49 ` [PATCH v9 5/7] clk: qcom: Add regmap mux-div clocks support Georgi Djakov
2017-09-21 16:49 ` [PATCH v9 6/7] dt-bindings: clock: Document qcom,apcs binding Georgi Djakov
2017-10-03 21:41 ` Rob Herring
2017-10-26 4:13 ` Bjorn Andersson
2017-09-21 16:49 ` [PATCH v9 7/7] clk: qcom: Add APCS clock controller support Georgi Djakov
2017-10-26 4:39 ` Bjorn Andersson
2017-10-25 11:56 ` [PATCH v9 0/7] Add support for Qualcomm A53 CPU clock Georgi Djakov
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20171026041923.GK1575@tuxbook \
--to=bjorn.andersson@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=georgi.djakov@linaro.org \
--cc=jassisinghbrar@gmail.com \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mturquette@baylibre.com \
--cc=robh+dt@kernel.org \
--cc=sboyd@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).