[PATCH v2 0/2] Add dwmac-sun8i on A83T DT

[PATCH v2 0/2] Add dwmac-sun8i on A83T DT

[Corentin Labbe]

Hello

This patch series add some device node for dwmac-sun8i on A83T.

Changes since v1:
- reworked commit log of patch #1
- added comment on drive strength

Corentin Labbe (2):
  ARM: sun8i: a83t: add dwmac-sun8i device node
  ARM: sun8i: bananapi-m3: Enable dwmac-sun8i

 arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 18 +++++++++++++++
 arch/arm/boot/dts/sun8i-a83t.dtsi            | 33 ++++++++++++++++++++++++++++
 2 files changed, 51 insertions(+)

-- 
2.13.6

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[PATCH v2 1/2] ARM: sun8i: a83t: add dwmac-sun8i device node

[Corentin Labbe]

The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000 speed.
This patch add support for it on the Allwinner a83t SoC Device-tree.

This patch add the emac device node and the related RGMII pins node.

Signed-off-by: Corentin Labbe <clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Reviewed-by: Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-a83t.dtsi | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 19acae1b4089..a384b766f3dc 100644
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -336,6 +336,18 @@
 			#interrupt-cells = <3>;
 			#gpio-cells = <3>;
 
+			emac_rgmii_pins: emac-rgmii-pins {
+				pins = "PD2", "PD3", "PD4", "PD5", "PD6", "PD7",
+				       "PD11", "PD12", "PD13", "PD14", "PD18",
+				       "PD19", "PD21", "PD22", "PD23";
+				function = "gmac";
+				/*
+				 * data lines in RGMII mode use DDR mode
+				 * and need a higher signal drive strength
+				 */
+				drive-strength = <40>;
+			};
+
 			mmc0_pins: mmc0-pins {
 				pins = "PF0", "PF1", "PF2",
 				       "PF3", "PF4", "PF5";
@@ -440,6 +452,27 @@
 			status = "disabled";
 		};
 
+		emac: ethernet@1c30000 {
+			compatible = "allwinner,sun8i-a83t-emac";
+			syscon = <&syscon>;
+			reg = <0x01c30000 0x104>;
+			interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "macirq";
+			resets = <&ccu 13>;
+			reset-names = "stmmaceth";
+			clocks = <&ccu 27>;
+			clock-names = "stmmaceth";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+			mdio: mdio {
+				compatible = "snps,dwmac-mdio";
+				#address-cells = <1>;
+				#size-cells = <0>;
+			};
+		};
+
 		gic: interrupt-controller@1c81000 {
 			compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
 			reg = <0x01c81000 0x1000>,
-- 
2.13.6

[PATCH v2 2/2] ARM: sun8i: bananapi-m3: Enable dwmac-sun8i

[Corentin Labbe]

The dwmac-sun8i hardware is present on the bananapi m3
It uses an external PHY rtl8211e via RGMII.

This patch create the needed emac and phy nodes.

Signed-off-by: Corentin Labbe <clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
 arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
index c606af3dbfed..45bdd5c17829 100644
--- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
+++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
@@ -52,6 +52,7 @@
 	compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
 
 	aliases {
+		ethernet0 = &emac;
 		serial0 = &uart0;
 	};
 
@@ -88,6 +89,23 @@
 	/* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
 };
 
+&emac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&emac_rgmii_pins>;
+	phy-handle = <&ext_rgmii_phy>;
+	phy-mode = "rgmii";
+	allwinner,rx-delay-ps = <700>;
+	allwinner,tx-delay-ps = <700>;
+
+	status = "okay";
+};
+
+&mdio {
+	ext_rgmii_phy: ethernet-phy@1 {
+		reg = <1>;
+	};
+};
+
 &mmc0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&mmc0_pins>;
-- 
2.13.6

Re: [PATCH v2 2/2] ARM: sun8i: bananapi-m3: Enable dwmac-sun8i

[Chen-Yu Tsai]

On Thu, Nov 9, 2017 at 4:29 PM, Corentin Labbe
<clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> The dwmac-sun8i hardware is present on the bananapi m3
> It uses an external PHY rtl8211e via RGMII.
>
> This patch create the needed emac and phy nodes.
>
> Signed-off-by: Corentin Labbe <clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
>  arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 18 ++++++++++++++++++
>  1 file changed, 18 insertions(+)
>
> diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> index c606af3dbfed..45bdd5c17829 100644
> --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> @@ -52,6 +52,7 @@
>         compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
>
>         aliases {
> +               ethernet0 = &emac;
>                 serial0 = &uart0;
>         };
>
> @@ -88,6 +89,23 @@
>         /* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
>  };
>
> +&emac {
> +       pinctrl-names = "default";
> +       pinctrl-0 = <&emac_rgmii_pins>;
> +       phy-handle = <&ext_rgmii_phy>;
> +       phy-mode = "rgmii";

Schematics say PHY is power by DC1SW from the PMIC.
Not sure why you don't need that. Have you tested your patch?

See https://github.com/wens/linux/commit/c2a12e2470b6d7988a3af043e0f030d8206ad68a

ChenYu

> +       allwinner,rx-delay-ps = <700>;
> +       allwinner,tx-delay-ps = <700>;
> +
> +       status = "okay";
> +};
> +
> +&mdio {
> +       ext_rgmii_phy: ethernet-phy@1 {
> +               reg = <1>;
> +       };
> +};
> +
>  &mmc0 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&mmc0_pins>;
> --
> 2.13.6
>
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Re: [PATCH v2 2/2] ARM: sun8i: bananapi-m3: Enable dwmac-sun8i

[Corentin Labbe]

On Fri, Nov 10, 2017 at 11:48:11AM +0800, Chen-Yu Tsai wrote:
> On Thu, Nov 9, 2017 at 4:29 PM, Corentin Labbe
> <clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> > The dwmac-sun8i hardware is present on the bananapi m3
> > It uses an external PHY rtl8211e via RGMII.
> >
> > This patch create the needed emac and phy nodes.
> >
> > Signed-off-by: Corentin Labbe <clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> > ---
> >  arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 18 ++++++++++++++++++
> >  1 file changed, 18 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> > index c606af3dbfed..45bdd5c17829 100644
> > --- a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> > +++ b/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
> > @@ -52,6 +52,7 @@
> >         compatible = "sinovoip,bpi-m3", "allwinner,sun8i-a83t";
> >
> >         aliases {
> > +               ethernet0 = &emac;
> >                 serial0 = &uart0;
> >         };
> >
> > @@ -88,6 +89,23 @@
> >         /* TODO GL830 USB-to-SATA bridge downstream w/ GPIO power controls */
> >  };
> >
> > +&emac {
> > +       pinctrl-names = "default";
> > +       pinctrl-0 = <&emac_rgmii_pins>;
> > +       phy-handle = <&ext_rgmii_phy>;
> > +       phy-mode = "rgmii";
> 
> Schematics say PHY is power by DC1SW from the PMIC.
> Not sure why you don't need that. Have you tested your patch?

Tested on 4.14.0-rc5-next-20171018+ 
I will try to check which uboot is used, perhaps it's an old uboot with some PMIC hack.

Thanks
Regards

Re: [PATCH v2 0/2] Add dwmac-sun8i on A83T DT

[Chen-Yu Tsai]

On Thu, Nov 9, 2017 at 4:29 PM, Corentin Labbe
<clabbe.montjoie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
> Hello
>
> This patch series add some device node for dwmac-sun8i on A83T.
>
> Changes since v1:
> - reworked commit log of patch #1
> - added comment on drive strength
>
> Corentin Labbe (2):
>   ARM: sun8i: a83t: add dwmac-sun8i device node
>   ARM: sun8i: bananapi-m3: Enable dwmac-sun8i

Subjects should have "dts:" prefix.
We could probably fix it up for you.

ChenYu

>
>  arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 18 +++++++++++++++
>  arch/arm/boot/dts/sun8i-a83t.dtsi            | 33 ++++++++++++++++++++++++++++
>  2 files changed, 51 insertions(+)
>
> --
> 2.13.6
>