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From: Yixun Lan <yixun.lan@amlogic.com>
To: Neil Armstrong <narmstrong@baylibre.com>,
	Jerome Brunet <jbrunet@baylibre.com>,
	Kevin Hilman <khilman@baylibre.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@codeaurora.org>,
	Carlo Caione <carlo@caione.org>,
	Yixun Lan <yixun.lan@amlogic.com>,
	Qiufang Dai <qiufang.dai@amlogic.com>,
	linux-amlogic@lists.infradead.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: [PATCH v3 3/3] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC
Date: Tue, 28 Nov 2017 20:53:30 +0800	[thread overview]
Message-ID: <20171128125330.363-4-yixun.lan@amlogic.com> (raw)
In-Reply-To: <20171128125330.363-1-yixun.lan@amlogic.com>

From: Qiufang Dai <qiufang.dai@amlogic.com>

Try to add Hiubus DT info, and also enable clock DT info
for the Amlogic's Meson-AXG SoC.

Signed-off-by: Qiufang Dai <qiufang.dai@amlogic.com>
Signed-off-by: Yixun Lan <yixun.lan@amlogic.com>
---
 arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
index b932a784b02a..36a2e98338a8 100644
--- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi
@@ -7,6 +7,7 @@
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/interrupt-controller/irq.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/clock/axg-clkc.h>
 
 / {
 	compatible = "amlogic,meson-axg";
@@ -148,6 +149,20 @@
 			#address-cells = <0>;
 		};
 
+		hiubus: hiubus@ff63c000 {
+			compatible = "simple-bus";
+			reg = <0x0 0xff63c000 0x0 0x1c00>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges = <0x0 0x0 0x0 0xff63c000 0x0 0x1c00>;
+
+			clkc: clock-controller@0 {
+				compatible = "amlogic,axg-clkc";
+				#clock-cells = <1>;
+				reg = <0x0 0x0 0x0 0x320>;
+			};
+		};
+
 		mailbox: mailbox@ff63dc00 {
 			compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
 			reg = <0 0xff63dc00 0 0x400>;
-- 
2.15.0

  parent reply	other threads:[~2017-11-28 12:53 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-11-28 12:53 [PATCH v3 0/3] add clk controller driver for Meson-AXG SoC Yixun Lan
2017-11-28 12:53 ` [PATCH v3 1/3] dt-bindings: clock: add compatible variant for the Meson-AXG Yixun Lan
2017-11-28 15:29   ` Rob Herring
2017-11-28 12:53 ` [PATCH v3 2/3] clk: meson-axg: add clock controller drivers Yixun Lan
     [not found]   ` <20171128125330.363-3-yixun.lan-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
2017-11-28 16:30     ` Rob Herring
2017-11-28 23:16       ` Yixun Lan
2017-11-29 19:34   ` Stephen Boyd
2017-11-30  6:01     ` Yixun Lan
     [not found]       ` <d2b58c06-93dc-4368-501e-4b8bdc9a4c34-LpR1jeaWuhtBDgjK7y7TUQ@public.gmane.org>
2017-12-01 16:39         ` Stephen Boyd
2017-11-28 12:53 ` Yixun Lan [this message]
2017-11-29 19:35   ` [PATCH v3 3/3] arm64: dts: meson-axg: add clock DT info for Meson AXG SoC Stephen Boyd
2017-11-30  6:01     ` Yixun Lan
2017-12-01 16:34       ` Stephen Boyd
2017-12-01 16:59         ` Jerome Brunet
2017-12-06  1:00           ` Stephen Boyd
2017-12-06 19:11             ` Kevin Hilman

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