From: Miquel RAYNAL <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
To: Gregory CLEMENT
<gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
Cc: Zhang Rui <rui.zhang-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org>,
Eduardo Valentin
<edubezval-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
Andrew Lunn <andrew-g2DYL2Zd6BY@public.gmane.org>,
Sebastian Hesselbarth
<sebastian.hesselbarth-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
Thomas Petazzoni
<thomas.petazzoni-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Baruch Siach <baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org>,
linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Antoine Tenart
<antoine.tenart-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Nadav Haklai <nadavh-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
David Sniatkiwicz
<davidsn-eYqpPyKDWXRBDgjK7y7TUQ@public.gmane.org>,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH v3 06/11] thermal: armada: Add support for Armada CP110
Date: Thu, 14 Dec 2017 12:33:01 +0100 [thread overview]
Message-ID: <20171214123301.1729df4f@xps13> (raw)
In-Reply-To: <87tvwto96y.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
On Thu, 14 Dec 2017 12:11:49 +0100
Gregory CLEMENT <gregory.clement-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
> Hi Miquel,
>
> On jeu., déc. 14 2017, Miquel Raynal
> <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org> wrote:
>
> > From: Baruch Siach <baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org>
> >
> > The CP110 component is integrated in the Armada 8k and 7k lines of
> > processors.
> >
> > Signed-off-by: Baruch Siach <baruch-NswTu9S1W3P6gbPvEgmw2w@public.gmane.org>
> > [<miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>: renamed the register
> > pointers]
>
> Actually you did more thant this see below
>
>
> > Signed-off-by: Miquel Raynal <miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
> > ---
> > drivers/thermal/armada_thermal.c | 30
> > ++++++++++++++++++++++++------ 1 file changed, 24 insertions(+), 6
> > deletions(-)
> >
> > diff --git a/drivers/thermal/armada_thermal.c
> > b/drivers/thermal/armada_thermal.c index 279d01937bb8..f5c911524656
> > 100644 --- a/drivers/thermal/armada_thermal.c
> > +++ b/drivers/thermal/armada_thermal.c
> > @@ -37,7 +37,6 @@
> > #define A375_UNIT_CONTROL_MASK 0x7
> > #define A375_READOUT_INVERT BIT(15)
> > #define A375_HW_RESETn BIT(8)
> > -#define A380_HW_RESET BIT(8)
> >
> > /* Legacy bindings */
> > #define LEGACY_CONTROL_MEM_LEN 0x4
> > @@ -52,6 +51,10 @@
> > #define CONTROL0_TSEN_RESET BIT(1)
> > #define CONTROL0_TSEN_ENABLE BIT(2)
> >
> > +/* EXT_TSEN refers to the external temperature sensors, out of the
> > AP */ +#define CONTROL1_EXT_TSEN_SW_RESET BIT(7)
> > +#define CONTROL1_EXT_TSEN_HW_RESETn BIT(8)
> You added or rename these values
>
> > +
> > struct armada_thermal_data;
> >
> > /* Marvell EBU Thermal Sensor Dev Structure */
> > @@ -153,11 +156,10 @@ static void armada380_init_sensor(struct
> > platform_device *pdev, u32 reg = readl_relaxed(priv->control1);
> >
> > /* Reset hardware once */
> > - if (!(reg & A380_HW_RESET)) {
> > - reg |= A380_HW_RESET;
> > - writel(reg, priv->control1);
> > - msleep(10);
> > - }
> > + reg |= CONTROL1_EXT_TSEN_HW_RESETn;
> > + reg &= ~CONTROL1_EXT_TSEN_SW_RESET;
> > + writel(reg, priv->control1);
>
> And here you modified the behavior of this function.
> Did you checked that it is valid for Armada 38x?
There is nothing about it the documentation and anyway this register
can be accessed later, so writing it is harmless ayway.
>
> Given the comment we had, I thought we should not do anything if
> CONTROL1_EXT_TSEN_HW_RESETn was not set.
That is the opposite, if it is not set (ie. reset is active), you have
to set it (reset is then disabled).
>
> By the way, if the new sequence is valid, this comment should be
> removed or at least updated.
That's right, I will in v4.
Thanks for reviewing,
Miquèl
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next prev parent reply other threads:[~2017-12-14 11:33 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-14 10:30 [PATCH v3 00/11] Armada thermal: improvements and A7K/A8K SoCs support Miquel Raynal
2017-12-14 10:30 ` [PATCH v3 01/11] dt-bindings: thermal: Describe Armada AP806 and CP110 Miquel Raynal
[not found] ` <20171214103011.24713-2-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-15 8:27 ` Baruch Siach
2017-12-15 8:32 ` Miquel RAYNAL
2017-12-15 8:44 ` Baruch Siach
2017-12-15 8:44 ` Gregory CLEMENT
[not found] ` <87po7gmlcs.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-15 10:52 ` Miquel RAYNAL
2017-12-15 23:28 ` Rob Herring
2017-12-16 12:50 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 02/11] thermal: armada: Use msleep for long delays Miquel Raynal
2017-12-14 10:51 ` Gregory CLEMENT
[not found] ` <20171214103011.24713-1-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 10:30 ` [PATCH v3 03/11] thermal: armada: Simplify the check of the validity bit Miquel Raynal
2017-12-14 10:52 ` Gregory CLEMENT
[not found] ` <20171214103011.24713-4-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-15 8:33 ` Baruch Siach
2017-12-15 10:56 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 04/11] thermal: armada: Rationalize register accesses Miquel Raynal
2017-12-15 8:56 ` Baruch Siach
2017-12-18 13:48 ` Miquel RAYNAL
[not found] ` <20171214103011.24713-5-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 10:55 ` Gregory CLEMENT
2017-12-16 22:18 ` Baruch Siach
2017-12-17 22:02 ` Baruch Siach
2017-12-18 12:37 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 05/11] thermal: armada: Add support for Armada AP806 Miquel Raynal
[not found] ` <20171214103011.24713-6-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:05 ` Gregory CLEMENT
2017-12-18 9:41 ` Miquel RAYNAL
2017-12-18 11:11 ` Baruch Siach
2017-12-18 12:25 ` Miquel RAYNAL
2017-12-16 22:22 ` Baruch Siach
2017-12-14 10:30 ` [PATCH v3 08/11] thermal: armada: Change sensors trim default value Miquel Raynal
2017-12-14 10:30 ` [PATCH v3 06/11] thermal: armada: Add support for Armada CP110 Miquel Raynal
[not found] ` <20171214103011.24713-7-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:11 ` Gregory CLEMENT
[not found] ` <87tvwto96y.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:33 ` Miquel RAYNAL [this message]
2017-12-14 11:37 ` Gregory CLEMENT
[not found] ` <87a7ylo803.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 12:24 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 07/11] thermal: armada: Update Kconfig and module description Miquel Raynal
[not found] ` <20171214103011.24713-8-miquel.raynal-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:13 ` Gregory CLEMENT
[not found] ` <87po7ho93k.fsf-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
2017-12-14 11:17 ` Miquel RAYNAL
2017-12-14 11:30 ` Gregory CLEMENT
2017-12-14 11:36 ` Miquel RAYNAL
2017-12-14 13:10 ` Thomas Petazzoni
2017-12-14 10:30 ` [PATCH v3 09/11] thermal: armada: Wait sensors validity before exiting the init callback Miquel Raynal
2017-12-14 11:23 ` Gregory CLEMENT
2017-12-14 11:27 ` Miquel RAYNAL
2017-12-14 10:30 ` [PATCH v3 10/11] thermal: armada: Give useful names to the thermal zone Miquel Raynal
2017-12-14 10:30 ` [PATCH v3 11/11] ARM64: dts: marvell: Add thermal support for A7K/A8K Miquel Raynal
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