From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH v2 10/11] dt-bindings: clock: qcom: add misc resets for PCIE and NSS Date: Fri, 15 Dec 2017 17:10:34 -0600 Message-ID: <20171215231034.wf6fhpbu7eqbjfp4@rob-hp-laptop> References: <1513175142-3702-1-git-send-email-absahu@codeaurora.org> <1513175142-3702-11-git-send-email-absahu@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1513175142-3702-11-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Abhishek Sahu Cc: Stephen Boyd , Michael Turquette , Andy Gross , David Brown , Mark Rutland , linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On Wed, Dec 13, 2017 at 07:55:41PM +0530, Abhishek Sahu wrote: > PCIE and NSS has MISC reset register in which single register has > multiple reset bit. The patch adds the DT bindings for these MISC > resets. > > Signed-off-by: Abhishek Sahu > --- > include/dt-bindings/clock/qcom,gcc-ipq8074.h | 42 ++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+) Reviewed-by: Rob Herring -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html