From: Kishon Vijay Abraham I <kishon-l0cyMroinI0@public.gmane.org>
To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
kishon-l0cyMroinI0@public.gmane.org
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
nsekhar-l0cyMroinI0@public.gmane.org
Subject: [PATCH 0/2] ti-pipe3: PCIe x2 lane mode configuration in dra72
Date: Tue, 19 Dec 2017 15:15:38 +0530 [thread overview]
Message-ID: <20171219094540.18432-1-kishon@ti.com> (raw)
DRA72 uses the same pipe3 PHY for the 2nd lane of PCIE and USB3 PHY.
By default it is configured to be used as USB3 PHY and some special
configuration has to be done inorder to use it for the 2nd lane of PCIE.
This series adds a new dt property and the configuration required to
enable 2nd lane of PCIE.
Kishon Vijay Abraham I (2):
dt-bindings: phy: ti-pipe3: Add dt binding to use USB3 PHY for PCIe
phy: ti-pipe3: configure usb3 phy to be used as pcie phy
Documentation/devicetree/bindings/phy/ti-phy.txt | 2 +
drivers/phy/ti/phy-ti-pipe3.c | 47 +++++++++++++++++++++---
2 files changed, 43 insertions(+), 6 deletions(-)
--
2.11.0
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next reply other threads:[~2017-12-19 9:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-19 9:45 Kishon Vijay Abraham I [this message]
2017-12-19 9:45 ` [PATCH 1/2] dt-bindings: phy: ti-pipe3: Add dt binding to use USB3 PHY for PCIe Kishon Vijay Abraham I
2017-12-20 20:55 ` Rob Herring
2017-12-19 9:45 ` [PATCH 2/2] phy: ti-pipe3: configure usb3 phy to be used as pcie phy Kishon Vijay Abraham I
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