From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: [PATCH v2 08/11] clk: qcom: ipq8074: add NSS ethernet port clocks Date: Thu, 21 Dec 2017 16:24:07 -0800 Message-ID: <20171222002407.GP7997@codeaurora.org> References: <1513175142-3702-1-git-send-email-absahu@codeaurora.org> <1513175142-3702-9-git-send-email-absahu@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit Return-path: Content-Disposition: inline In-Reply-To: <1513175142-3702-9-git-send-email-absahu-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Abhishek Sahu Cc: Michael Turquette , Rob Herring , Andy Gross , David Brown , Mark Rutland , linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: devicetree@vger.kernel.org On 12/13, Abhishek Sahu wrote: > IPQ8074 has 6 ethernet ports which supports all ethernet speeds > from 10Mpbs to 10 Gpbs and each speed requires different clock > rates. Each port has separate TX and RX clocks. These clocks > use separate external UNIPHY PLL’s which will be registered with > separate NSS driver. The clock frequency is 125 Mhz for UNIPHY0 > and 312.5 Mhz for UNIPHY1 and UNIPHY2. > > Signed-off-by: Abhishek Sahu > --- Applied to clk-next -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html