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From: Tony Lindgren <tony@atomide.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>
Cc: Jeffy Chen <jeffy.chen@rock-chips.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Linux PM <linux-pm@vger.kernel.org>,
	Shawn Lin <shawn.lin@rock-chips.com>,
	Brian Norris <briannorris@chromium.org>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Doug Anderson <dianders@chromium.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Linux PCI <linux-pci@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>
Subject: Re: [RFC PATCH v12 1/5] dt-bindings: PCI: Add definition of PCIe WAKE# irq and PCI irq
Date: Wed, 3 Jan 2018 11:54:44 -0800	[thread overview]
Message-ID: <20180103195444.GN3875@atomide.com> (raw)
In-Reply-To: <CAJZ5v0hTUvqOFZU5OGaDL9EXZ+TnxbMDZdnqJ+_tvddm3YfgbQ@mail.gmail.com>

* Rafael J. Wysocki <rafael@kernel.org> [171230 00:34]:
> On Sat, Dec 30, 2017 at 12:50 AM, Rafael J. Wysocki <rafael@kernel.org> wrote:
> > On Fri, Dec 29, 2017 at 6:57 PM, Tony Lindgren <tony@atomide.com> wrote:
> >> * Jeffy Chen <jeffy.chen@rock-chips.com> [171226 02:11]:
> >>> We are going to handle PCIe WAKE# pin for PCI devices in the pci core,
> >>> so add definitions of the optional PCIe WAKE# pin for PCI devices.
> >>>
> >>> Also add an definition of the optional PCI interrupt pin for PCI
> >>> devices to distinguish it from the PCIe WAKE# pin.
> >>
> >>> --- a/Documentation/devicetree/bindings/pci/pci.txt
> >>> +++ b/Documentation/devicetree/bindings/pci/pci.txt
> >>> @@ -24,3 +24,13 @@ driver implementation may support the following properties:
> >>>     unsupported link speed, for instance, trying to do training for
> >>>     unsupported link speed, etc.  Must be '4' for gen4, '3' for gen3, '2'
> >>>     for gen2, and '1' for gen1. Any other values are invalid.
> >>> +
> >>> +PCI devices may support the following properties:
> >>
> >> This should say PCI ports instead of PCI devices.
> >
> > No, it is more accurate to say "PCI devices".
> >
> > Well, it actually gets somewhat confusing, because in the PCI
> > terminology a "PCI device" means a physical piece of hardware that can
> > be put into a single "slot" (think socket on a board) and may consist
> > up to 8 functional units called "functions" which are each represented
> > by a struct pci_dev.  So there may be up to 8 struct pci_dev objects
> > per "PCI device" (as per the standard language) and, BTW, drivers bind
> > to functions (via the struct pci_dev objects).
> >
> > Now, WAKE# is shared by all functions within the same "PCI device"
> > (I'm not sure if the standard specifies that directly, but at least it
> > appears to be treated as an obvious physical limitation), so it may be
> > useful to represent the "slot" or "device" level in the DT even though
> > it has no struct device based representation in the kernel.
> 
> Within the convention that bridges represent "everything below them"
> as far as WAKE# is concerned, it can say "The following properties may
> be provided for PCI bridges:" and the description below should explain
> the convention.

Sounds good to me.

Regards,

Tony

  reply	other threads:[~2018-01-03 19:54 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-26  2:08 [RFC PATCH v12 0/5] PCI: rockchip: Move PCIe WAKE# handling into pci core Jeffy Chen
2017-12-26  2:08 ` [RFC PATCH v12 1/5] dt-bindings: PCI: Add definition of PCIe WAKE# irq and PCI irq Jeffy Chen
2017-12-29 17:57   ` Tony Lindgren
2017-12-29 23:50     ` Rafael J. Wysocki
2017-12-30  0:31       ` Rafael J. Wysocki
2018-01-03 19:54         ` Tony Lindgren [this message]
2018-01-03 19:53       ` Tony Lindgren
     [not found] ` <20171226020806.32710-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2017-12-26  2:08   ` [RFC PATCH v12 2/5] of/irq: Adjust of_pci_irq parsing for multiple interrupts Jeffy Chen
2017-12-26  2:08 ` [RFC PATCH v12 4/5] PCI / PM: Add support for the PCIe WAKE# signal for OF Jeffy Chen
2017-12-26  2:08 ` [RFC PATCH v12 5/5] arm64: dts: rockchip: Move PCIe WAKE# irq to pcie port for Gru Jeffy Chen
  -- strict thread matches above, loose matches on Subject: below --
2017-12-26  2:36 [RFC PATCH v12 0/5] PCI: rockchip: Move PCIe WAKE# handling into pci core Jeffy Chen
2017-12-26  2:36 ` [RFC PATCH v12 1/5] dt-bindings: PCI: Add definition of PCIe WAKE# irq and PCI irq Jeffy Chen
2017-12-26 23:35   ` Rob Herring
2017-12-27  0:43     ` Rafael J. Wysocki
2017-12-27  1:36       ` JeffyChen

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