From mboxrd@z Thu Jan 1 00:00:00 1970 From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= Subject: [PATCH v2 1/2] arm64: dts: r8a7795: update register size for thermal Date: Fri, 5 Jan 2018 16:54:46 +0100 Message-ID: <20180105155447.10071-2-niklas.soderlund+renesas@ragnatech.se> References: <20180105155447.10071-1-niklas.soderlund+renesas@ragnatech.se> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Return-path: In-Reply-To: <20180105155447.10071-1-niklas.soderlund+renesas@ragnatech.se> Sender: linux-renesas-soc-owner@vger.kernel.org To: devicetree@vger.kernel.org, Simon Horman , Magnus Damm Cc: linux-renesas-soc@vger.kernel.org, =?UTF-8?q?Niklas=20S=C3=B6derlund?= List-Id: devicetree@vger.kernel.org To be able to read fused calibration values from hardware the size of the register resource of TSC1 needs to be incremented to cover one more register which holds the information if the calibration values have been fused or not. Instead of increasing TSC1 size to the value from the datasheet update all TSC's size to the smallest granularity of the address decoder circuitry Signed-off-by: Niklas Söderlund Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 19b7de57704c67e8..ce85704976f0d3ef 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -2385,9 +2385,9 @@ tsc: thermal@e6198000 { compatible = "renesas,r8a7795-thermal"; - reg = <0 0xe6198000 0 0x68>, - <0 0xe61a0000 0 0x5c>, - <0 0xe61a8000 0 0x5c>; + reg = <0 0xe6198000 0 0x100>, + <0 0xe61a0000 0 0x100>, + <0 0xe61a8000 0 0x100>; interrupts = , , ; -- 2.15.1