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From: Rob Herring <robh@kernel.org>
To: Hyun Kwon <hyun.kwon@xilinx.com>
Cc: devicetree@vger.kernel.org,
	Michal Simek <michal.simek@xilinx.com>,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 06/10] dt-bindings: display: xlnx: Add ZynqMP DP subsystem bindings
Date: Mon, 8 Jan 2018 22:07:13 -0600	[thread overview]
Message-ID: <20180109040713.rusxuzhkhp262zgf@rob-hp-laptop> (raw)
In-Reply-To: <1515117959-18068-7-git-send-email-hyun.kwon@xilinx.com>

On Thu, Jan 04, 2018 at 06:05:55PM -0800, Hyun Kwon wrote:
> This add a dt binding for ZynqMP DP subsystem.
> 
> Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
> ---
>  .../bindings/display/xlnx/xlnx,zynqmp-dpsub.txt    | 94 ++++++++++++++++++++++
>  1 file changed, 94 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.txt
> 
> diff --git a/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.txt b/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.txt
> new file mode 100644
> index 0000000..4e478ca
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/xlnx/xlnx,zynqmp-dpsub.txt
> @@ -0,0 +1,94 @@
> +Xilinx ZynqMP DisplayPort subsystem
> +-----------------------------------
> +
> +Required properties:
> +
> +- compatible: Must be "xlnx,zynqmp-dpsub-1.7".
> +
> +- reg: Physical base address and length of the registers set for the device.
> +- reg-names: Must be "dp", "blend", "av_buf", and "aud" to map logical register
> +  partitions.
> +
> +- interrupts: Interrupt number.
> +- interrupts-parent: phandle for interrupt controller.
> +
> +- clocks: phandles for axi, audio, non-live video, and live video clocks.
> +  axi clock is required. Audio clock is optional. If not present, audio will
> +  be disabled. One of non-live or live video clock should be present.
> +- clock-names: The identification strings are required. "aclk" for axi clock.
> +  "dp_aud_clk" for audio clock. "dp_vtc_pixel_clk_in" for non-live video clock.
> +  "dp_live_video_in_clk" for live video clock (clock from programmable logic).

"_clk" is redundant.

> +
> +- phys: phandles for phy specifier.
> +- phy-names: The identifier strings. "dp-phy" followed by index.
> +
> +- power-domains: phandle for the corresponding power domain
> +
> +- ports: crtc and encoder ports are required using DT bindings defined in
> +  Documentation/devicetree/bindings/graph.txt.

Isn't the connection crtc->encoder?

Also, crtc is pretty much a DRM term. Don't use that in bindings. 
Describe the h/w blocks.

> +
> +- vid-layer, gfx-layer: Required to represent available layers
> +
> +Required layer properties
> +
> +- dmas: phandles for DMA channels as defined in
> +  Documentation/devicetree/bindings/dma/dma.txt.
> +- dma-names: The identifier strings are required. "graphics0" for graphics
> +  layer. "video" followed by index for video layer
> +
> +Optional child node
> +
> +- The driver populates any child device node in this node. This can be used,
> +  for example, to populate the sound device from the DisplayPort subsystem
> +  driver.
> +
> +Example:
> +	zynqmp_dpsub: zynqmp_dpsub@fd4a0000 {

display-controller@...

> +		compatible = "xlnx,zynqmp-dpsub-1.7";
> +		reg = <0x0 0xfd4a0000 0x0 0x1000>,
> +		      <0x0 0xfd4aa000 0x0 0x1000>,
> +		      <0x0 0xfd4ab000 0x0 0x1000>,
> +		      <0x0 0xfd4ac000 0x0 0x1000>;
> +		reg-names = "dp", "blend", "av_buf", "aud";
> +		interrupts = <0 119 4>;
> +		interrupt-parent = <&gic>;
> +
> +		clock-names = "dp_apb_clk", "dp_aud_clk", "dp_live_video_in_clk";
> +		clocks = <&dp_aclk>, <&clkc 17>, <&si570_1>;
> +
> +		phys = <&lane1 PHY_TYPE_DP 0 1 27000000>,
> +		       <&lane0 PHY_TYPE_DP 1 1 27000000>;
> +		phy-names = "dp-phy0", "dp-phy1";
> +
> +		power-domains = <&pd_dp>;
> +
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		vid-layer {
> +			dma-names = "vid0", "vid1", "vid2";
> +			dmas = <&xlnx_dpdma 0>,
> +			       <&xlnx_dpdma 1>,
> +			       <&xlnx_dpdma 2>;
> +		};
> +
> +		gfx-layer {

These 2 nodes don't seem necessary. Just make "dmas" take 4 values and 
define where the gfx0 channel is located (index 0 or 3?).

> +			dma-names = "gfx0";
> +			dmas = <&xlnx_dpdma 3>;
> +		};
> +
> +		crtc_port: port@0 {
> +			reg = <0>;
> +			crtc: endpoint {
> +				remote-endpoint = <&encoder>;
> +			};
> +		};
> +		port@1 {

Multiple port nodes should be under a ports node especially if you have 
other child nodes.

> +			reg = <1>;
> +			encoder: endpoint {
> +				remote-endpoint = <&crtc>;
> +			};
> +		};
> +	};
> +};
> +
> -- 
> 2.7.4
> 
> --
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  reply	other threads:[~2018-01-09  4:07 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-05  2:05 [PATCH 00/10] Xilinx ZynqMP DisplayPort subsystem DRM KMS driver Hyun Kwon
     [not found] ` <1515117959-18068-1-git-send-email-hyun.kwon-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2018-01-05  2:05   ` [PATCH 01/10] dt-bindings: display: xlnx: Add Xilinx kms bindings Hyun Kwon
     [not found]     ` <1515117959-18068-2-git-send-email-hyun.kwon-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2018-01-09  4:00       ` Rob Herring
2018-01-11  2:04         ` Hyun Kwon
     [not found]           ` <BY1PR0201MB1000969ECDC38A62F68B7238D6160-QYJsKn8jqXK8fGmG9BO4UxrHTHEw16jenBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2018-01-11 14:43             ` Rob Herring
     [not found]               ` <CAL_JsqJ_84qg=oJb=HzwgdP9T8osczNT-Eo+u5wjJfT3B8gAQQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-01-11 19:22                 ` Hyun Kwon
2018-01-05  2:05   ` [PATCH 02/10] drm: xlnx: Add xlnx crtc of Xilinx DRM KMS Hyun Kwon
2018-01-09  9:37     ` Daniel Vetter
     [not found]       ` <20180109093733.GG26573-dv86pmgwkMBes7Z6vYuT8azUEOm+Xw19@public.gmane.org>
2018-01-11  2:04         ` Hyun Kwon
2018-01-11  7:48           ` Daniel Vetter
2018-01-05  2:05   ` [PATCH 03/10] drm: xlnx: Add xlnx fb " Hyun Kwon
2018-01-09  9:35     ` Daniel Vetter
2018-01-11  2:04       ` Hyun Kwon
2018-01-05  2:05   ` [PATCH 04/10] drm: xlnx: Add xlnx gem " Hyun Kwon
2018-01-05  2:05   ` [PATCH 05/10] drm: xlnx: Xilinx DRM KMS driver Hyun Kwon
     [not found]     ` <1515117959-18068-6-git-send-email-hyun.kwon-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2018-01-09  9:51       ` Daniel Vetter
2018-01-11  2:05         ` Hyun Kwon
2018-01-05  2:05   ` [PATCH 06/10] dt-bindings: display: xlnx: Add ZynqMP DP subsystem bindings Hyun Kwon
2018-01-09  4:07     ` Rob Herring [this message]
2018-01-11  2:06       ` Hyun Kwon
2018-01-05  2:05   ` [PATCH 07/10] drm: xlnx: DRM KMS driver for Xilinx ZynqMP DP subsystem display Hyun Kwon
     [not found]     ` <1515117959-18068-8-git-send-email-hyun.kwon-gjFFaj9aHVfQT0dZR+AlfA@public.gmane.org>
2018-01-09  9:46       ` Daniel Vetter
     [not found]         ` <20180109094652.GH26573-dv86pmgwkMBes7Z6vYuT8azUEOm+Xw19@public.gmane.org>
2018-01-11  2:04           ` Hyun Kwon
2018-01-05  2:05   ` [PATCH 08/10] drm: xlnx: DRM KMS driver for Xilinx ZynqMP DisplayPort Hyun Kwon
2018-01-05  2:05   ` [PATCH 09/10] drm: xlnx: ZynqMP DP subsystem DRM KMS driver Hyun Kwon
2018-01-05  2:05   ` [PATCH 10/10] drm: xlnx: zynqmp: Add debugfs Hyun Kwon
2018-01-09  9:54     ` Daniel Vetter
2018-01-11  2:05       ` Hyun Kwon
     [not found]         ` <BY1PR0201MB10001A1C38398BFBAEC56D39D6160-QYJsKn8jqXK8fGmG9BO4UxrHTHEw16jenBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2018-01-11  8:06           ` Daniel Vetter
     [not found]             ` <20180111080605.GB13066-dv86pmgwkMBes7Z6vYuT8azUEOm+Xw19@public.gmane.org>
2018-01-11 16:57               ` Hyun Kwon
2018-01-09  9:56   ` [PATCH 00/10] Xilinx ZynqMP DisplayPort subsystem DRM KMS driver Daniel Vetter
     [not found]     ` <20180109095649.GK26573-dv86pmgwkMBes7Z6vYuT8azUEOm+Xw19@public.gmane.org>
2018-01-11  2:07       ` Hyun Kwon
     [not found]         ` <BY1PR0201MB10002CAFCC860052538BA14DD6160-QYJsKn8jqXK8fGmG9BO4UxrHTHEw16jenBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2018-01-11  8:07           ` Daniel Vetter
     [not found]             ` <20180111080738.GC13066-dv86pmgwkMBes7Z6vYuT8azUEOm+Xw19@public.gmane.org>
2018-01-11  8:16               ` Michal Simek

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