From: Chen-Yu Tsai <wens@csie.org>
To: Maxime Ripard <maxime.ripard@bootlin.com>,
Rob Herring <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
David Airlie <airlied@linux.ie>
Cc: Chen-Yu Tsai <wens@csie.org>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org
Subject: [PATCH 2/8] drm/sun4i: Add DT binding for Detail Enhancement Unit in Allwinner A80 SoC
Date: Thu, 15 Mar 2018 19:41:30 +0800 [thread overview]
Message-ID: <20180315114136.24747-3-wens@csie.org> (raw)
In-Reply-To: <20180315114136.24747-1-wens@csie.org>
The display pipeline on the A80 SoC has what is called the Detail
Enhancement Unit, or DEU for short, block in between the display
frontend and backend. This unit can sharpen images in both luma
and chroma channels. It seems to also do colorspace conversion.
This patch adds the device tree binding for this hardware block.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
---
.../bindings/display/sunxi/sun4i-drm.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
index c05cbcdde4d7..671d75c76ad0 100644
--- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
+++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt
@@ -248,6 +248,28 @@ On the A33, some additional properties are required:
- resets and reset-names need to have a phandle to the SAT bus
resets, whose name will be "sat"
+DEU
+---
+
+The DEU (Detail Enhancement Unit), found in the Allwinner A80 SoC,
+can sharpen the display content in both luma and chroma channels.
+
+Required properties:
+ - compatible: value must be one of:
+ * allwinner,sun9i-a80-deu
+ - reg: base address and size of the memory-mapped region.
+ - interrupts: interrupt associated to this IP
+ - clocks: phandles to the clocks feeding the DEU
+ * ahb: the DEU interface clock
+ * mod: the DEU module clock
+ * ram: the DEU DRAM clock
+ - clock-names: the clock names mentioned above
+ - resets: phandles to the reset line driving the DEU
+
+- ports: A ports node with endpoint definitions as defined in
+ Documentation/devicetree/bindings/media/video-interfaces.txt. The
+ first port should be the input endpoints, the second one the outputs
+
Display Engine Frontend
-----------------------
--
2.16.2
next prev parent reply other threads:[~2018-03-15 11:41 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-03-15 11:41 [PATCH 0/8] ARM: sun9i: a80: Add display support Chen-Yu Tsai
2018-03-15 11:41 ` [PATCH 1/8] drm/sun4i: Add compatible strings for A80 TCONs Chen-Yu Tsai
2018-03-18 12:52 ` Rob Herring
2018-03-15 11:41 ` Chen-Yu Tsai [this message]
2018-03-18 12:52 ` [PATCH 2/8] drm/sun4i: Add DT binding for Detail Enhancement Unit in Allwinner A80 SoC Rob Herring
2018-03-15 11:41 ` [PATCH 3/8] drm/sun4i: Add support for A80 TCONs Chen-Yu Tsai
2018-03-15 11:41 ` [PATCH 4/8] drm/sun4i: Add compatible strings for the A80 display pipeline Chen-Yu Tsai
2018-03-18 12:52 ` Rob Herring
2018-03-15 11:41 ` [PATCH 5/8] drm/sun4i: Add driver support for " Chen-Yu Tsai
2018-03-15 11:41 ` [PATCH 6/8] ARM: dts: sun9i: Add device nodes for documented display pipelines for A80 Chen-Yu Tsai
2018-03-15 11:41 ` [PATCH 7/8] ARM: dts: sun9i: Add pinmux settings for LCD0 RGB888 output Chen-Yu Tsai
2018-03-15 11:41 ` [PATCH 8/8] ARM: dts: sun9i: cubieboard4: Enable VGA display output Chen-Yu Tsai
2018-03-19 21:13 ` [PATCH 0/8] ARM: sun9i: a80: Add display support Maxime Ripard
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