* [PATCH v8 00/14] iommu/rockchip: Use OF_IOMMU
@ 2018-03-23 7:38 Jeffy Chen
2018-03-23 7:38 ` [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes Jeffy Chen
[not found] ` <20180323073814.5802-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
0 siblings, 2 replies; 12+ messages in thread
From: Jeffy Chen @ 2018-03-23 7:38 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Mark Rutland, Heiko Stuebner, Catalin Marinas, Shawn Lin,
Will Deacon, Kever Yang, Finley Xiao, Romain Perier, Sugar Zhang,
Brian Norris, Russell King, jcliang-F7+t8E8rja9g9hUCZPvPmw,
linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Nickey Yang,
Jacob Chen, Liang Chen, Caesar Wang,
devicetree-u79uwXL29TY76Z2rM5mHXA, Arnd Bergmann, Jeffy Chen,
Rob Herring, Mark Yao,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA, Davi
This series fixes some issues in rockchip iommu driver, and add of_iommu
support in it.
Changes in v8:
Rebase on newest for-next.
Don't introduce the additional return.
Rename startup()/shutdown() to enable()/disable().
Do runtime PM suspend in .shutdown().
Modify pm_runtime_get_if_in_use()/pm_runtime_put() as Tomasz suggested.
Changes in v7:
Use iommu_group_ref_get to avoid ref leak
Changes in v6:
Add clk names, and modify all iommu nodes in all existing rockchip dts
Fix dt-binding as Robin suggested.
Use aclk and iface clk as Rob and Robin suggested, and split binding
patch.
Changes in v5:
Use out labels to save the duplication between the error and success paths.
Use RK_MMU_POLL_PERIOD_US instead of 100.
Remove clk names.
Use clk_bulk APIs.
Avoid race about pm_runtime_get_if_in_use() and pm_runtime_enabled().
Changes in v4:
Rewrite commit message.
Changes in v3:
Also remove remove() and module_exit() as Tomasz suggested.
Loop platform_get_irq() as Robin suggested.
Add struct rk_iommudata.
Squash iommu/rockchip: Use iommu_group_get_for_dev() for add_device
Only call startup() and shutdown() when iommu attached.
Remove pm_mutex.
Check runtime PM disabled.
Check pm_runtime in rk_iommu_irq().
Remove rk_iommudata->domain.
Changes in v2:
Move irq request to probe(in patch[0])
Move bus_set_iommu() to rk_iommu_probe().
Jeffy Chen (10):
iommu/rockchip: Prohibit unbind and remove
iommu/rockchip: Fix error handling in probe
iommu/rockchip: Request irqs in rk_iommu_probe()
ARM: dts: rockchip: add clocks in iommu nodes
dt-bindings: iommu/rockchip: Add clock property
iommu/rockchip: Use IOMMU device for dma mapping operations
iommu/rockchip: Use OF_IOMMU to attach devices automatically
iommu/rockchip: Fix error handling in init
iommu/rockchip: Add runtime PM support
iommu/rockchip: Support sharing IOMMU between masters
Tomasz Figa (4):
iommu/rockchip: Fix error handling in attach
iommu/rockchip: Use iopoll helpers to wait for hardware
iommu/rockchip: Fix TLB flush of secondary IOMMUs
iommu/rockchip: Control clocks needed to access the IOMMU
.../devicetree/bindings/iommu/rockchip,iommu.txt | 7 +
arch/arm/boot/dts/rk3036.dtsi | 2 +
arch/arm/boot/dts/rk322x.dtsi | 8 +
arch/arm/boot/dts/rk3288.dtsi | 12 +
arch/arm64/boot/dts/rockchip/rk3328.dtsi | 10 +
arch/arm64/boot/dts/rockchip/rk3368.dtsi | 10 +
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 14 +-
drivers/iommu/rockchip-iommu.c | 600 +++++++++++----------
8 files changed, 363 insertions(+), 300 deletions(-)
--
2.11.0
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes 2018-03-23 7:38 [PATCH v8 00/14] iommu/rockchip: Use OF_IOMMU Jeffy Chen @ 2018-03-23 7:38 ` Jeffy Chen 2018-04-09 14:41 ` Tomeu Vizoso 2018-04-10 11:46 ` Heiko Stuebner [not found] ` <20180323073814.5802-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 1 sibling, 2 replies; 12+ messages in thread From: Jeffy Chen @ 2018-03-23 7:38 UTC (permalink / raw) To: linux-kernel Cc: jcliang, robin.murphy, xxm, tfiga, Jeffy Chen, Romain Perier, Yakir Yang, Arnd Bergmann, Liang Chen, Rob Herring, Shawn Lin, Catalin Marinas, David Wu, Finley Xiao, Enric Balletbo i Serra, Heiko Stuebner, Jacob Chen, Kever Yang, Brian Norris, linux-rockchip, Rocky Hao, Will Deacon <will.de> Add clocks in iommu nodes, since we are going to control clocks in rockchip iommu driver. Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> --- Changes in v8: None Changes in v7: None Changes in v6: Add clk names, and modify all iommu nodes in all existing rockchip dts Changes in v5: Remove clk names. Changes in v4: None Changes in v3: None Changes in v2: None arch/arm/boot/dts/rk3036.dtsi | 2 ++ arch/arm/boot/dts/rk322x.dtsi | 8 ++++++++ arch/arm/boot/dts/rk3288.dtsi | 12 ++++++++++++ arch/arm64/boot/dts/rockchip/rk3328.dtsi | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 10 ++++++++++ arch/arm64/boot/dts/rockchip/rk3399.dtsi | 14 ++++++++++++-- 6 files changed, 54 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index a97458112ff6..567a6a725f9c 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -197,6 +197,8 @@ reg = <0x10118300 0x100>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vop_mmu"; + clocks = <&cru ACLK_LCDC>, <&cru HCLK_LCDC>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index df1e47858675..be80e9a2c9af 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -584,6 +584,8 @@ reg = <0x20020800 0x100>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vpu_mmu"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk", "iface"; iommu-cells = <0>; status = "disabled"; }; @@ -593,6 +595,8 @@ reg = <0x20030480 0x40>, <0x200304c0 0x40>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vdec_mmu"; + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; + clock-names = "aclk", "iface"; iommu-cells = <0>; status = "disabled"; }; @@ -602,6 +606,8 @@ reg = <0x20053f00 0x100>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vop_mmu"; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + clock-names = "aclk", "iface"; iommu-cells = <0>; status = "disabled"; }; @@ -611,6 +617,8 @@ reg = <0x20070800 0x100>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "iep_mmu"; + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; + clock-names = "aclk", "iface"; iommu-cells = <0>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index be9acb6d28a1..d7e49d29ace5 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -959,6 +959,8 @@ reg = <0x0 0xff900800 0x0 0x40>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "iep_mmu"; + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -968,6 +970,8 @@ reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "isp_mmu"; + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; rockchip,disable-mmu-reset; status = "disabled"; @@ -1027,6 +1031,8 @@ reg = <0x0 0xff930300 0x0 0x100>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vopb_mmu"; + clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; + clock-names = "aclk", "iface"; power-domains = <&power RK3288_PD_VIO>; #iommu-cells = <0>; status = "disabled"; @@ -1075,6 +1081,8 @@ reg = <0x0 0xff940300 0x0 0x100>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vopl_mmu"; + clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; + clock-names = "aclk", "iface"; power-domains = <&power RK3288_PD_VIO>; #iommu-cells = <0>; status = "disabled"; @@ -1206,6 +1214,8 @@ reg = <0x0 0xff9a0800 0x0 0x100>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vpu_mmu"; + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -1215,6 +1225,8 @@ reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>; interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hevc_mmu"; + clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index be2bfbc6b483..b8e9da15e00c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -595,6 +595,8 @@ reg = <0x0 0xff330200 0 0x100>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "h265e_mmu"; + clocks = <&cru ACLK_H265>, <&cru PCLK_H265>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -604,6 +606,8 @@ reg = <0x0 0xff340800 0x0 0x40>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vepu_mmu"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -613,6 +617,8 @@ reg = <0x0 0xff350800 0x0 0x40>; interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vpu_mmu"; + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -622,6 +628,8 @@ reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "rkvdec_mmu"; + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -631,6 +639,8 @@ reg = <0x0 0xff373f00 0x0 0x100>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vop_mmu"; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 03458ac44201..ad91ced78649 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -742,6 +742,8 @@ reg = <0x0 0xff900800 0x0 0x100>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "iep_mmu"; + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -752,6 +754,8 @@ <0x0 0xff915000 0x0 0x100>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "isp_mmu"; + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; rockchip,disable-mmu-reset; status = "disabled"; @@ -762,6 +766,8 @@ reg = <0x0 0xff930300 0x0 0x100>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vop_mmu"; + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -772,6 +778,8 @@ <0x0 0xff9a0480 0x0 0x40>; interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hevc_mmu"; + clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -782,6 +790,8 @@ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vepu_mmu", "vdpu_mmu"; + clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 4550c0f82be9..56f6bb31b399 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1234,6 +1234,8 @@ reg = <0x0 0xff650800 0x0 0x40>; interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "vpu_mmu"; + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -1243,6 +1245,8 @@ reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>; interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "vdec_mmu"; + clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -1252,6 +1256,8 @@ reg = <0x0 0xff670800 0x0 0x40>; interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "iep_mmu"; + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; status = "disabled"; }; @@ -1599,7 +1605,7 @@ interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "vopl_mmu"; clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; - clock-names = "aclk", "hclk"; + clock-names = "aclk", "iface"; power-domains = <&power RK3399_PD_VOPL>; #iommu-cells = <0>; status = "disabled"; @@ -1656,7 +1662,7 @@ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "vopb_mmu"; clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; - clock-names = "aclk", "hclk"; + clock-names = "aclk", "iface"; power-domains = <&power RK3399_PD_VOPB>; #iommu-cells = <0>; status = "disabled"; @@ -1667,6 +1673,8 @@ reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "isp0_mmu"; + clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; rockchip,disable-mmu-reset; status = "disabled"; @@ -1677,6 +1685,8 @@ reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>; interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>; interrupt-names = "isp1_mmu"; + clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; rockchip,disable-mmu-reset; status = "disabled"; -- 2.11.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes 2018-03-23 7:38 ` [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes Jeffy Chen @ 2018-04-09 14:41 ` Tomeu Vizoso 2018-04-09 15:44 ` Heiko Stübner 2018-04-10 11:46 ` Heiko Stuebner 1 sibling, 1 reply; 12+ messages in thread From: Tomeu Vizoso @ 2018-04-09 14:41 UTC (permalink / raw) To: Jeffy Chen Cc: open list, jcliang, robin.murphy, simon xue, tfiga, Romain Perier, Yakir Yang, Arnd Bergmann, Liang Chen, Rob Herring, Shawn Lin, Catalin Marinas, David Wu, Finley Xiao, Enric Balletbo i Serra, Heiko Stuebner, Jacob Chen, Kever Yang, Brian Norris, open list:ARM/Rockchip SoC..., Rocky Hao <rocky.h> Hi there, in today's linux-next, the DRM driver fails to probe because the iommu driver fails to find the aclk. I need to apply this patch for things to work again. Thanks, Tomeu On 23 March 2018 at 08:38, Jeffy Chen <jeffy.chen@rock-chips.com> wrote: > Add clocks in iommu nodes, since we are going to control clocks in > rockchip iommu driver. > > Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> > --- > > Changes in v8: None > Changes in v7: None > Changes in v6: > Add clk names, and modify all iommu nodes in all existing rockchip dts > > Changes in v5: > Remove clk names. > > Changes in v4: None > Changes in v3: None > Changes in v2: None > > arch/arm/boot/dts/rk3036.dtsi | 2 ++ > arch/arm/boot/dts/rk322x.dtsi | 8 ++++++++ > arch/arm/boot/dts/rk3288.dtsi | 12 ++++++++++++ > arch/arm64/boot/dts/rockchip/rk3328.dtsi | 10 ++++++++++ > arch/arm64/boot/dts/rockchip/rk3368.dtsi | 10 ++++++++++ > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 14 ++++++++++++-- > 6 files changed, 54 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi > index a97458112ff6..567a6a725f9c 100644 > --- a/arch/arm/boot/dts/rk3036.dtsi > +++ b/arch/arm/boot/dts/rk3036.dtsi > @@ -197,6 +197,8 @@ > reg = <0x10118300 0x100>; > interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vop_mmu"; > + clocks = <&cru ACLK_LCDC>, <&cru HCLK_LCDC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi > index df1e47858675..be80e9a2c9af 100644 > --- a/arch/arm/boot/dts/rk322x.dtsi > +++ b/arch/arm/boot/dts/rk322x.dtsi > @@ -584,6 +584,8 @@ > reg = <0x20020800 0x100>; > interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vpu_mmu"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "iface"; > iommu-cells = <0>; > status = "disabled"; > }; > @@ -593,6 +595,8 @@ > reg = <0x20030480 0x40>, <0x200304c0 0x40>; > interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vdec_mmu"; > + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; > + clock-names = "aclk", "iface"; > iommu-cells = <0>; > status = "disabled"; > }; > @@ -602,6 +606,8 @@ > reg = <0x20053f00 0x100>; > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vop_mmu"; > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > + clock-names = "aclk", "iface"; > iommu-cells = <0>; > status = "disabled"; > }; > @@ -611,6 +617,8 @@ > reg = <0x20070800 0x100>; > interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "iep_mmu"; > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > + clock-names = "aclk", "iface"; > iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi > index be9acb6d28a1..d7e49d29ace5 100644 > --- a/arch/arm/boot/dts/rk3288.dtsi > +++ b/arch/arm/boot/dts/rk3288.dtsi > @@ -959,6 +959,8 @@ > reg = <0x0 0xff900800 0x0 0x40>; > interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "iep_mmu"; > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -968,6 +970,8 @@ > reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "isp_mmu"; > + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > rockchip,disable-mmu-reset; > status = "disabled"; > @@ -1027,6 +1031,8 @@ > reg = <0x0 0xff930300 0x0 0x100>; > interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vopb_mmu"; > + clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; > + clock-names = "aclk", "iface"; > power-domains = <&power RK3288_PD_VIO>; > #iommu-cells = <0>; > status = "disabled"; > @@ -1075,6 +1081,8 @@ > reg = <0x0 0xff940300 0x0 0x100>; > interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vopl_mmu"; > + clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > + clock-names = "aclk", "iface"; > power-domains = <&power RK3288_PD_VIO>; > #iommu-cells = <0>; > status = "disabled"; > @@ -1206,6 +1214,8 @@ > reg = <0x0 0xff9a0800 0x0 0x100>; > interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vpu_mmu"; > + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -1215,6 +1225,8 @@ > reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>; > interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "hevc_mmu"; > + clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > index be2bfbc6b483..b8e9da15e00c 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > @@ -595,6 +595,8 @@ > reg = <0x0 0xff330200 0 0x100>; > interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "h265e_mmu"; > + clocks = <&cru ACLK_H265>, <&cru PCLK_H265>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -604,6 +606,8 @@ > reg = <0x0 0xff340800 0x0 0x40>; > interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vepu_mmu"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -613,6 +617,8 @@ > reg = <0x0 0xff350800 0x0 0x40>; > interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vpu_mmu"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -622,6 +628,8 @@ > reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>; > interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "rkvdec_mmu"; > + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -631,6 +639,8 @@ > reg = <0x0 0xff373f00 0x0 0x100>; > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vop_mmu"; > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > index 03458ac44201..ad91ced78649 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > @@ -742,6 +742,8 @@ > reg = <0x0 0xff900800 0x0 0x100>; > interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "iep_mmu"; > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -752,6 +754,8 @@ > <0x0 0xff915000 0x0 0x100>; > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "isp_mmu"; > + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > rockchip,disable-mmu-reset; > status = "disabled"; > @@ -762,6 +766,8 @@ > reg = <0x0 0xff930300 0x0 0x100>; > interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vop_mmu"; > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -772,6 +778,8 @@ > <0x0 0xff9a0480 0x0 0x40>; > interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "hevc_mmu"; > + clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -782,6 +790,8 @@ > interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vepu_mmu", "vdpu_mmu"; > + clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > index 4550c0f82be9..56f6bb31b399 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -1234,6 +1234,8 @@ > reg = <0x0 0xff650800 0x0 0x40>; > interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "vpu_mmu"; > + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -1243,6 +1245,8 @@ > reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>; > interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "vdec_mmu"; > + clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -1252,6 +1256,8 @@ > reg = <0x0 0xff670800 0x0 0x40>; > interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "iep_mmu"; > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -1599,7 +1605,7 @@ > interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "vopl_mmu"; > clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > - clock-names = "aclk", "hclk"; > + clock-names = "aclk", "iface"; > power-domains = <&power RK3399_PD_VOPL>; > #iommu-cells = <0>; > status = "disabled"; > @@ -1656,7 +1662,7 @@ > interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "vopb_mmu"; > clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; > - clock-names = "aclk", "hclk"; > + clock-names = "aclk", "iface"; > power-domains = <&power RK3399_PD_VOPB>; > #iommu-cells = <0>; > status = "disabled"; > @@ -1667,6 +1673,8 @@ > reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; > interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "isp0_mmu"; > + clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > rockchip,disable-mmu-reset; > status = "disabled"; > @@ -1677,6 +1685,8 @@ > reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>; > interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "isp1_mmu"; > + clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > rockchip,disable-mmu-reset; > status = "disabled"; > -- > 2.11.0 > > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes 2018-04-09 14:41 ` Tomeu Vizoso @ 2018-04-09 15:44 ` Heiko Stübner 2018-04-09 15:53 ` Robin Murphy 0 siblings, 1 reply; 12+ messages in thread From: Heiko Stübner @ 2018-04-09 15:44 UTC (permalink / raw) To: Tomeu Vizoso Cc: Jeffy Chen, open list, jcliang, robin.murphy, simon xue, tfiga, Romain Perier, Yakir Yang, Arnd Bergmann, Liang Chen, Rob Herring, Shawn Lin, Catalin Marinas, David Wu, Finley Xiao, Enric Balletbo i Serra, Jacob Chen, Kever Yang, Brian Norris, open list:ARM/Rockchip SoC... Hi Tomeu, Am Montag, 9. April 2018, 16:41:56 CEST schrieb Tomeu Vizoso: > in today's linux-next, the DRM driver fails to probe because the iommu > driver fails to find the aclk. I need to apply this patch for things > to work again. Thanks for catching that issue. This seems to expose a backwards-compatibility issue, as this breaks all old devicetrees, so should get a proper fix, apart from me applying the dt-patch I missed. Looking at the iommu-clock-handling patch, I imagine this part as the culprit: + iommu->num_clocks = ARRAY_SIZE(rk_iommu_clocks); + iommu->clocks = devm_kcalloc(iommu->dev, iommu->num_clocks, + sizeof(*iommu->clocks), GFP_KERNEL); + if (!iommu->clocks) + return -ENOMEM; The clk-bulk functions seem to work with simple for loops and should (as the other standard clock functions) just work fine with an empty struct, so I guess a simple if (!iommu->clocks && iommu->num_clocks > 0) return -ENOMEM; should hopefully be enough. I'll try to give this a test later on if nobody beats me to it :-) Heiko > > Thanks, > > Tomeu > > On 23 March 2018 at 08:38, Jeffy Chen <jeffy.chen@rock-chips.com> wrote: > > Add clocks in iommu nodes, since we are going to control clocks in > > rockchip iommu driver. > > > > Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> > > --- > > > > Changes in v8: None > > Changes in v7: None > > Changes in v6: > > Add clk names, and modify all iommu nodes in all existing rockchip dts > > > > Changes in v5: > > Remove clk names. > > > > Changes in v4: None > > Changes in v3: None > > Changes in v2: None > > > > arch/arm/boot/dts/rk3036.dtsi | 2 ++ > > arch/arm/boot/dts/rk322x.dtsi | 8 ++++++++ > > arch/arm/boot/dts/rk3288.dtsi | 12 ++++++++++++ > > arch/arm64/boot/dts/rockchip/rk3328.dtsi | 10 ++++++++++ > > arch/arm64/boot/dts/rockchip/rk3368.dtsi | 10 ++++++++++ > > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 14 ++++++++++++-- > > 6 files changed, 54 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi > > index a97458112ff6..567a6a725f9c 100644 > > --- a/arch/arm/boot/dts/rk3036.dtsi > > +++ b/arch/arm/boot/dts/rk3036.dtsi > > @@ -197,6 +197,8 @@ > > > > reg = <0x10118300 0x100>; > > interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vop_mmu"; > > > > + clocks = <&cru ACLK_LCDC>, <&cru HCLK_LCDC>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi > > index df1e47858675..be80e9a2c9af 100644 > > --- a/arch/arm/boot/dts/rk322x.dtsi > > +++ b/arch/arm/boot/dts/rk322x.dtsi > > @@ -584,6 +584,8 @@ > > > > reg = <0x20020800 0x100>; > > interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vpu_mmu"; > > > > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > > + clock-names = "aclk", "iface"; > > > > iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -593,6 +595,8 @@ > > > > reg = <0x20030480 0x40>, <0x200304c0 0x40>; > > interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vdec_mmu"; > > > > + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; > > + clock-names = "aclk", "iface"; > > > > iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -602,6 +606,8 @@ > > > > reg = <0x20053f00 0x100>; > > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vop_mmu"; > > > > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > > + clock-names = "aclk", "iface"; > > > > iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -611,6 +617,8 @@ > > > > reg = <0x20070800 0x100>; > > interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "iep_mmu"; > > > > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > > + clock-names = "aclk", "iface"; > > > > iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi > > index be9acb6d28a1..d7e49d29ace5 100644 > > --- a/arch/arm/boot/dts/rk3288.dtsi > > +++ b/arch/arm/boot/dts/rk3288.dtsi > > @@ -959,6 +959,8 @@ > > > > reg = <0x0 0xff900800 0x0 0x40>; > > interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "iep_mmu"; > > > > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -968,6 +970,8 @@ > > > > reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 > > 0x100>; > > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "isp_mmu"; > > > > + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > rockchip,disable-mmu-reset; > > status = "disabled"; > > > > @@ -1027,6 +1031,8 @@ > > > > reg = <0x0 0xff930300 0x0 0x100>; > > interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vopb_mmu"; > > > > + clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; > > + clock-names = "aclk", "iface"; > > > > power-domains = <&power RK3288_PD_VIO>; > > #iommu-cells = <0>; > > status = "disabled"; > > > > @@ -1075,6 +1081,8 @@ > > > > reg = <0x0 0xff940300 0x0 0x100>; > > interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vopl_mmu"; > > > > + clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > > + clock-names = "aclk", "iface"; > > > > power-domains = <&power RK3288_PD_VIO>; > > #iommu-cells = <0>; > > status = "disabled"; > > > > @@ -1206,6 +1214,8 @@ > > > > reg = <0x0 0xff9a0800 0x0 0x100>; > > interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vpu_mmu"; > > > > + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -1215,6 +1225,8 @@ > > > > reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 > > 0x40>; > > interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "hevc_mmu"; > > > > + clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > > b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index > > be2bfbc6b483..b8e9da15e00c 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > > @@ -595,6 +595,8 @@ > > > > reg = <0x0 0xff330200 0 0x100>; > > interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "h265e_mmu"; > > > > + clocks = <&cru ACLK_H265>, <&cru PCLK_H265>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -604,6 +606,8 @@ > > > > reg = <0x0 0xff340800 0x0 0x40>; > > interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vepu_mmu"; > > > > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -613,6 +617,8 @@ > > > > reg = <0x0 0xff350800 0x0 0x40>; > > interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vpu_mmu"; > > > > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -622,6 +628,8 @@ > > > > reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 > > 0x40>; > > interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "rkvdec_mmu"; > > > > + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -631,6 +639,8 @@ > > > > reg = <0x0 0xff373f00 0x0 0x100>; > > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vop_mmu"; > > > > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi > > b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index > > 03458ac44201..ad91ced78649 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > > @@ -742,6 +742,8 @@ > > > > reg = <0x0 0xff900800 0x0 0x100>; > > interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "iep_mmu"; > > > > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -752,6 +754,8 @@ > > > > <0x0 0xff915000 0x0 0x100>; > > > > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "isp_mmu"; > > > > + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > rockchip,disable-mmu-reset; > > status = "disabled"; > > > > @@ -762,6 +766,8 @@ > > > > reg = <0x0 0xff930300 0x0 0x100>; > > interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "vop_mmu"; > > > > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -772,6 +778,8 @@ > > > > <0x0 0xff9a0480 0x0 0x40>; > > > > interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; > > interrupt-names = "hevc_mmu"; > > > > + clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -782,6 +790,8 @@ > > > > interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, > > > > <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; > > > > interrupt-names = "vepu_mmu", "vdpu_mmu"; > > > > + clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > > b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index > > 4550c0f82be9..56f6bb31b399 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > > @@ -1234,6 +1234,8 @@ > > > > reg = <0x0 0xff650800 0x0 0x40>; > > interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>; > > interrupt-names = "vpu_mmu"; > > > > + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -1243,6 +1245,8 @@ > > > > reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 > > 0x40>; > > interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>; > > interrupt-names = "vdec_mmu"; > > > > + clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -1252,6 +1256,8 @@ > > > > reg = <0x0 0xff670800 0x0 0x40>; > > interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>; > > interrupt-names = "iep_mmu"; > > > > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > status = "disabled"; > > > > }; > > > > @@ -1599,7 +1605,7 @@ > > > > interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; > > interrupt-names = "vopl_mmu"; > > clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > > > > - clock-names = "aclk", "hclk"; > > + clock-names = "aclk", "iface"; > > > > power-domains = <&power RK3399_PD_VOPL>; > > #iommu-cells = <0>; > > status = "disabled"; > > > > @@ -1656,7 +1662,7 @@ > > > > interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; > > interrupt-names = "vopb_mmu"; > > clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; > > > > - clock-names = "aclk", "hclk"; > > + clock-names = "aclk", "iface"; > > > > power-domains = <&power RK3399_PD_VOPB>; > > #iommu-cells = <0>; > > status = "disabled"; > > > > @@ -1667,6 +1673,8 @@ > > > > reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 > > 0x100>; > > interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>; > > interrupt-names = "isp0_mmu"; > > > > + clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > rockchip,disable-mmu-reset; > > status = "disabled"; > > > > @@ -1677,6 +1685,8 @@ > > > > reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 > > 0x100>; > > interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>; > > interrupt-names = "isp1_mmu"; > > > > + clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>; > > + clock-names = "aclk", "iface"; > > > > #iommu-cells = <0>; > > rockchip,disable-mmu-reset; > > status = "disabled"; > > > > -- > > 2.11.0 ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes 2018-04-09 15:44 ` Heiko Stübner @ 2018-04-09 15:53 ` Robin Murphy 2018-04-09 15:55 ` Heiko Stübner 0 siblings, 1 reply; 12+ messages in thread From: Robin Murphy @ 2018-04-09 15:53 UTC (permalink / raw) To: Heiko Stübner, Tomeu Vizoso Cc: Jeffy Chen, open list, jcliang, simon xue, tfiga, Romain Perier, Yakir Yang, Arnd Bergmann, Liang Chen, Rob Herring, Shawn Lin, Catalin Marinas, David Wu, Finley Xiao, Enric Balletbo i Serra, Jacob Chen, Kever Yang, Brian Norris, open list:ARM/Rockchip SoC..., Rocky Hao On 09/04/18 16:44, Heiko Stübner wrote: > Hi Tomeu, > > Am Montag, 9. April 2018, 16:41:56 CEST schrieb Tomeu Vizoso: >> in today's linux-next, the DRM driver fails to probe because the iommu >> driver fails to find the aclk. I need to apply this patch for things >> to work again. > > Thanks for catching that issue. > > This seems to expose a backwards-compatibility issue, as this breaks > all old devicetrees, so should get a proper fix, apart from me applying > the dt-patch I missed. > > Looking at the iommu-clock-handling patch, I imagine this part as > the culprit: > > + iommu->num_clocks = ARRAY_SIZE(rk_iommu_clocks); > + iommu->clocks = devm_kcalloc(iommu->dev, iommu->num_clocks, > + sizeof(*iommu->clocks), GFP_KERNEL); > + if (!iommu->clocks) > + return -ENOMEM; > > The clk-bulk functions seem to work with simple for loops and > should (as the other standard clock functions) just work fine with > an empty struct, so I guess a simple > > if (!iommu->clocks && iommu->num_clocks > 0) > return -ENOMEM; > > should hopefully be enough. I'll try to give this a test later on > if nobody beats me to it :-) But iommu->num_clocks is clearly set to a nonzero compile-time constant at this point ;) I'd assume it's the return from devm_clk_bulk_get() which needs to special-case the "no clocks found" case from any other error, and *then* blat num_clocks to 0 if so. Robin. ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes 2018-04-09 15:53 ` Robin Murphy @ 2018-04-09 15:55 ` Heiko Stübner 2018-04-09 21:49 ` Heiko Stübner 0 siblings, 1 reply; 12+ messages in thread From: Heiko Stübner @ 2018-04-09 15:55 UTC (permalink / raw) To: Robin Murphy Cc: Tomeu Vizoso, Jeffy Chen, open list, jcliang, simon xue, tfiga, Romain Perier, Yakir Yang, Arnd Bergmann, Liang Chen, Rob Herring, Shawn Lin, Catalin Marinas, David Wu, Finley Xiao, Enric Balletbo i Serra, Jacob Chen, Kever Yang, Brian Norris, open list:ARM/Rockchip SoC... Am Montag, 9. April 2018, 17:53:01 CEST schrieb Robin Murphy: > On 09/04/18 16:44, Heiko Stübner wrote: > > Hi Tomeu, > > > > Am Montag, 9. April 2018, 16:41:56 CEST schrieb Tomeu Vizoso: > >> in today's linux-next, the DRM driver fails to probe because the iommu > >> driver fails to find the aclk. I need to apply this patch for things > >> to work again. > > > > Thanks for catching that issue. > > > > This seems to expose a backwards-compatibility issue, as this breaks > > all old devicetrees, so should get a proper fix, apart from me applying > > the dt-patch I missed. > > > > Looking at the iommu-clock-handling patch, I imagine this part as > > the culprit: > > > > + iommu->num_clocks = ARRAY_SIZE(rk_iommu_clocks); > > + iommu->clocks = devm_kcalloc(iommu->dev, iommu->num_clocks, > > + sizeof(*iommu->clocks), GFP_KERNEL); > > + if (!iommu->clocks) > > + return -ENOMEM; > > > > The clk-bulk functions seem to work with simple for loops and > > should (as the other standard clock functions) just work fine with > > an empty struct, so I guess a simple > > > > if (!iommu->clocks && iommu->num_clocks > 0) > > > > return -ENOMEM; > > > > should hopefully be enough. I'll try to give this a test later on > > if nobody beats me to it :-) > > But iommu->num_clocks is clearly set to a nonzero compile-time constant > at this point ;) > > I'd assume it's the return from devm_clk_bulk_get() which needs to > special-case the "no clocks found" case from any other error, and *then* > blat num_clocks to 0 if so. you're right of course. Looking at it again, I now clearly see the ARRAY_SIZE and am wondering what made me think num_clocks would be runtime-read. Must be those 25°C today ;-) ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes 2018-04-09 15:55 ` Heiko Stübner @ 2018-04-09 21:49 ` Heiko Stübner 2018-04-10 10:54 ` Heiko Stuebner 0 siblings, 1 reply; 12+ messages in thread From: Heiko Stübner @ 2018-04-09 21:49 UTC (permalink / raw) To: Robin Murphy Cc: Tomeu Vizoso, Jeffy Chen, open list, jcliang, simon xue, tfiga, Romain Perier, Yakir Yang, Arnd Bergmann, Liang Chen, Rob Herring, Shawn Lin, Catalin Marinas, David Wu, Finley Xiao, Enric Balletbo i Serra, Jacob Chen, Kever Yang, Brian Norris, open list:ARM/Rockchip SoC... Am Montag, 9. April 2018, 17:55:40 CEST schrieb Heiko Stübner: > Am Montag, 9. April 2018, 17:53:01 CEST schrieb Robin Murphy: > > On 09/04/18 16:44, Heiko Stübner wrote: > > > Hi Tomeu, > > > > > > Am Montag, 9. April 2018, 16:41:56 CEST schrieb Tomeu Vizoso: > > >> in today's linux-next, the DRM driver fails to probe because the iommu > > >> driver fails to find the aclk. I need to apply this patch for things > > >> to work again. > > > > > > Thanks for catching that issue. > > > > > > This seems to expose a backwards-compatibility issue, as this breaks > > > all old devicetrees, so should get a proper fix, apart from me applying > > > the dt-patch I missed. > > > > > > Looking at the iommu-clock-handling patch, I imagine this part as > > > the culprit: > > > > > > + iommu->num_clocks = ARRAY_SIZE(rk_iommu_clocks); > > > + iommu->clocks = devm_kcalloc(iommu->dev, iommu->num_clocks, > > > + sizeof(*iommu->clocks), GFP_KERNEL); > > > + if (!iommu->clocks) > > > + return -ENOMEM; > > > > > > The clk-bulk functions seem to work with simple for loops and > > > should (as the other standard clock functions) just work fine with > > > an empty struct, so I guess a simple > > > > > > if (!iommu->clocks && iommu->num_clocks > 0) > > > > > > return -ENOMEM; > > > > > > should hopefully be enough. I'll try to give this a test later on > > > if nobody beats me to it :-) > > > > But iommu->num_clocks is clearly set to a nonzero compile-time constant > > at this point ;) > > > > I'd assume it's the return from devm_clk_bulk_get() which needs to > > special-case the "no clocks found" case from any other error, and *then* > > blat num_clocks to 0 if so. > > you're right of course. Looking at it again, I now clearly see the > ARRAY_SIZE and am wondering what made me think num_clocks would be > runtime-read. > > Must be those 25°C today ;-) In any case, this does not seem to fully fix the issue ... or be more exact seems to be the only issue. - With 4.16 both pinky and kevin have working displays. - When I was merging display patches to drm-misc, I did boot-tests on both pinky and kevin, keeping their displays in a working state. - With current torvalds head (iommu not merged yet) e9092d0d9796 ("Fix subtle macro variable shadowing in min_not_zero()") I get display output on rk3399-kevin (edp), but not on rk3288-pinky (edp + hdmi). [components + hdmi device+modes get recognized correctly though] - With iommu changes merged I end up with the failing clock issue which can be countered by making the iommu-clocks optional. - After that I get working display output again on kevin but not pinky. Looks like this needs bisecting. ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes 2018-04-09 21:49 ` Heiko Stübner @ 2018-04-10 10:54 ` Heiko Stuebner 0 siblings, 0 replies; 12+ messages in thread From: Heiko Stuebner @ 2018-04-10 10:54 UTC (permalink / raw) To: Robin Murphy Cc: Tomeu Vizoso, Jeffy Chen, open list, jcliang, simon xue, tfiga, Romain Perier, Yakir Yang, Arnd Bergmann, Liang Chen, Rob Herring, Shawn Lin, Catalin Marinas, David Wu, Finley Xiao, Enric Balletbo i Serra, Jacob Chen, Kever Yang, Brian Norris, open list:ARM/Rockchip SoC... Am Montag, 9. April 2018, 23:49:58 CEST schrieb Heiko Stübner: > Am Montag, 9. April 2018, 17:55:40 CEST schrieb Heiko Stübner: > > Am Montag, 9. April 2018, 17:53:01 CEST schrieb Robin Murphy: > > > On 09/04/18 16:44, Heiko Stübner wrote: > > > > Hi Tomeu, > > > > > > > > Am Montag, 9. April 2018, 16:41:56 CEST schrieb Tomeu Vizoso: > > > >> in today's linux-next, the DRM driver fails to probe because the iommu > > > >> driver fails to find the aclk. I need to apply this patch for things > > > >> to work again. > > > > > > > > Thanks for catching that issue. > > > > > > > > This seems to expose a backwards-compatibility issue, as this breaks > > > > all old devicetrees, so should get a proper fix, apart from me applying > > > > the dt-patch I missed. > > > > > > > > Looking at the iommu-clock-handling patch, I imagine this part as > > > > the culprit: > > > > > > > > + iommu->num_clocks = ARRAY_SIZE(rk_iommu_clocks); > > > > + iommu->clocks = devm_kcalloc(iommu->dev, iommu->num_clocks, > > > > + sizeof(*iommu->clocks), GFP_KERNEL); > > > > + if (!iommu->clocks) > > > > + return -ENOMEM; > > > > > > > > The clk-bulk functions seem to work with simple for loops and > > > > should (as the other standard clock functions) just work fine with > > > > an empty struct, so I guess a simple > > > > > > > > if (!iommu->clocks && iommu->num_clocks > 0) > > > > > > > > return -ENOMEM; > > > > > > > > should hopefully be enough. I'll try to give this a test later on > > > > if nobody beats me to it :-) > > > > > > But iommu->num_clocks is clearly set to a nonzero compile-time constant > > > at this point ;) > > > > > > I'd assume it's the return from devm_clk_bulk_get() which needs to > > > special-case the "no clocks found" case from any other error, and *then* > > > blat num_clocks to 0 if so. > > > > you're right of course. Looking at it again, I now clearly see the > > ARRAY_SIZE and am wondering what made me think num_clocks would be > > runtime-read. > > > > Must be those 25°C today ;-) > > In any case, this does not seem to fully fix the issue ... or be more exact > seems to be the only issue. > > - With 4.16 both pinky and kevin have working displays. > - When I was merging display patches to drm-misc, I did boot-tests on > both pinky and kevin, keeping their displays in a working state. > > - With current torvalds head (iommu not merged yet) > e9092d0d9796 ("Fix subtle macro variable shadowing in min_not_zero()") > > I get display output on rk3399-kevin (edp), but not on > rk3288-pinky (edp + hdmi). [components + hdmi device+modes get > recognized correctly though] > > - With iommu changes merged I end up with the failing clock issue > which can be countered by making the iommu-clocks optional. > > - After that I get working display output again on kevin but not pinky. > > Looks like this needs bisecting. And it seems the dwc2 vbus thingy was responsible for the other issue I saw. With Tomeus fixup patch applied and the series I sent an hour ago, I now get display output again on both kevin (rk3399) and pinky (rk3288). Heiko ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes 2018-03-23 7:38 ` [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes Jeffy Chen 2018-04-09 14:41 ` Tomeu Vizoso @ 2018-04-10 11:46 ` Heiko Stuebner 1 sibling, 0 replies; 12+ messages in thread From: Heiko Stuebner @ 2018-04-10 11:46 UTC (permalink / raw) To: Jeffy Chen Cc: linux-kernel, jcliang, robin.murphy, xxm, tfiga, Romain Perier, Yakir Yang, Arnd Bergmann, Liang Chen, Rob Herring, Shawn Lin, Catalin Marinas, David Wu, Finley Xiao, Enric Balletbo i Serra, Jacob Chen, Kever Yang, Brian Norris, linux-rockchip, Rocky Hao, Will Deacon, Nickey Yang Am Freitag, 23. März 2018, 08:38:07 CEST schrieb Jeffy Chen: > Add clocks in iommu nodes, since we are going to control clocks in > rockchip iommu driver. > > Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com> applied for 4.18 after splitting arm32+arm64 parts into 2 patches and adapting the subject for the arm64 variant. Please don't mix arm32+arm64 devicetree patches in the future. Thanks Heiko > --- > > Changes in v8: None > Changes in v7: None > Changes in v6: > Add clk names, and modify all iommu nodes in all existing rockchip dts > > Changes in v5: > Remove clk names. > > Changes in v4: None > Changes in v3: None > Changes in v2: None > > arch/arm/boot/dts/rk3036.dtsi | 2 ++ > arch/arm/boot/dts/rk322x.dtsi | 8 ++++++++ > arch/arm/boot/dts/rk3288.dtsi | 12 ++++++++++++ > arch/arm64/boot/dts/rockchip/rk3328.dtsi | 10 ++++++++++ > arch/arm64/boot/dts/rockchip/rk3368.dtsi | 10 ++++++++++ > arch/arm64/boot/dts/rockchip/rk3399.dtsi | 14 ++++++++++++-- > 6 files changed, 54 insertions(+), 2 deletions(-) > > diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi > index a97458112ff6..567a6a725f9c 100644 > --- a/arch/arm/boot/dts/rk3036.dtsi > +++ b/arch/arm/boot/dts/rk3036.dtsi > @@ -197,6 +197,8 @@ > reg = <0x10118300 0x100>; > interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vop_mmu"; > + clocks = <&cru ACLK_LCDC>, <&cru HCLK_LCDC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi > index df1e47858675..be80e9a2c9af 100644 > --- a/arch/arm/boot/dts/rk322x.dtsi > +++ b/arch/arm/boot/dts/rk322x.dtsi > @@ -584,6 +584,8 @@ > reg = <0x20020800 0x100>; > interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vpu_mmu"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "iface"; > iommu-cells = <0>; > status = "disabled"; > }; > @@ -593,6 +595,8 @@ > reg = <0x20030480 0x40>, <0x200304c0 0x40>; > interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vdec_mmu"; > + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; > + clock-names = "aclk", "iface"; > iommu-cells = <0>; > status = "disabled"; > }; > @@ -602,6 +606,8 @@ > reg = <0x20053f00 0x100>; > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vop_mmu"; > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > + clock-names = "aclk", "iface"; > iommu-cells = <0>; > status = "disabled"; > }; > @@ -611,6 +617,8 @@ > reg = <0x20070800 0x100>; > interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "iep_mmu"; > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > + clock-names = "aclk", "iface"; > iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi > index be9acb6d28a1..d7e49d29ace5 100644 > --- a/arch/arm/boot/dts/rk3288.dtsi > +++ b/arch/arm/boot/dts/rk3288.dtsi > @@ -959,6 +959,8 @@ > reg = <0x0 0xff900800 0x0 0x40>; > interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "iep_mmu"; > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -968,6 +970,8 @@ > reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "isp_mmu"; > + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > rockchip,disable-mmu-reset; > status = "disabled"; > @@ -1027,6 +1031,8 @@ > reg = <0x0 0xff930300 0x0 0x100>; > interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vopb_mmu"; > + clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; > + clock-names = "aclk", "iface"; > power-domains = <&power RK3288_PD_VIO>; > #iommu-cells = <0>; > status = "disabled"; > @@ -1075,6 +1081,8 @@ > reg = <0x0 0xff940300 0x0 0x100>; > interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vopl_mmu"; > + clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > + clock-names = "aclk", "iface"; > power-domains = <&power RK3288_PD_VIO>; > #iommu-cells = <0>; > status = "disabled"; > @@ -1206,6 +1214,8 @@ > reg = <0x0 0xff9a0800 0x0 0x100>; > interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vpu_mmu"; > + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -1215,6 +1225,8 @@ > reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>; > interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "hevc_mmu"; > + clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > index be2bfbc6b483..b8e9da15e00c 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi > @@ -595,6 +595,8 @@ > reg = <0x0 0xff330200 0 0x100>; > interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "h265e_mmu"; > + clocks = <&cru ACLK_H265>, <&cru PCLK_H265>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -604,6 +606,8 @@ > reg = <0x0 0xff340800 0x0 0x40>; > interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vepu_mmu"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -613,6 +617,8 @@ > reg = <0x0 0xff350800 0x0 0x40>; > interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vpu_mmu"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -622,6 +628,8 @@ > reg = <0x0 0xff360480 0x0 0x40>, <0x0 0xff3604c0 0x0 0x40>; > interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "rkvdec_mmu"; > + clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -631,6 +639,8 @@ > reg = <0x0 0xff373f00 0x0 0x100>; > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vop_mmu"; > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > index 03458ac44201..ad91ced78649 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi > @@ -742,6 +742,8 @@ > reg = <0x0 0xff900800 0x0 0x100>; > interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "iep_mmu"; > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -752,6 +754,8 @@ > <0x0 0xff915000 0x0 0x100>; > interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "isp_mmu"; > + clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > rockchip,disable-mmu-reset; > status = "disabled"; > @@ -762,6 +766,8 @@ > reg = <0x0 0xff930300 0x0 0x100>; > interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vop_mmu"; > + clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -772,6 +778,8 @@ > <0x0 0xff9a0480 0x0 0x40>; > interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "hevc_mmu"; > + clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -782,6 +790,8 @@ > interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; > interrupt-names = "vepu_mmu", "vdpu_mmu"; > + clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > index 4550c0f82be9..56f6bb31b399 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi > @@ -1234,6 +1234,8 @@ > reg = <0x0 0xff650800 0x0 0x40>; > interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "vpu_mmu"; > + clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -1243,6 +1245,8 @@ > reg = <0x0 0xff660480 0x0 0x40>, <0x0 0xff6604c0 0x0 0x40>; > interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "vdec_mmu"; > + clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -1252,6 +1256,8 @@ > reg = <0x0 0xff670800 0x0 0x40>; > interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "iep_mmu"; > + clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > status = "disabled"; > }; > @@ -1599,7 +1605,7 @@ > interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "vopl_mmu"; > clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; > - clock-names = "aclk", "hclk"; > + clock-names = "aclk", "iface"; > power-domains = <&power RK3399_PD_VOPL>; > #iommu-cells = <0>; > status = "disabled"; > @@ -1656,7 +1662,7 @@ > interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "vopb_mmu"; > clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; > - clock-names = "aclk", "hclk"; > + clock-names = "aclk", "iface"; > power-domains = <&power RK3399_PD_VOPB>; > #iommu-cells = <0>; > status = "disabled"; > @@ -1667,6 +1673,8 @@ > reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; > interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "isp0_mmu"; > + clocks = <&cru ACLK_ISP0_NOC>, <&cru HCLK_ISP0_NOC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > rockchip,disable-mmu-reset; > status = "disabled"; > @@ -1677,6 +1685,8 @@ > reg = <0x0 0xff924000 0x0 0x100>, <0x0 0xff925000 0x0 0x100>; > interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH 0>; > interrupt-names = "isp1_mmu"; > + clocks = <&cru ACLK_ISP1_NOC>, <&cru HCLK_ISP1_NOC>; > + clock-names = "aclk", "iface"; > #iommu-cells = <0>; > rockchip,disable-mmu-reset; > status = "disabled"; > ^ permalink raw reply [flat|nested] 12+ messages in thread
[parent not found: <20180323073814.5802-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* [PATCH v8 09/14] dt-bindings: iommu/rockchip: Add clock property [not found] ` <20180323073814.5802-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2018-03-23 7:38 ` Jeffy Chen [not found] ` <20180323073814.5802-10-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2018-03-29 10:24 ` [PATCH v8 00/14] iommu/rockchip: Use OF_IOMMU Joerg Roedel 1 sibling, 1 reply; 12+ messages in thread From: Jeffy Chen @ 2018-03-23 7:38 UTC (permalink / raw) To: linux-kernel-u79uwXL29TY76Z2rM5mHXA Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA, Jeffy Chen, jcliang-F7+t8E8rja9g9hUCZPvPmw, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA, Rob Herring, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Heiko Stuebner Add clock property, since we are going to control clocks in rockchip iommu driver. Signed-off-by: Jeffy Chen <jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org> Reviewed-by: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> --- Changes in v8: None Changes in v7: None Changes in v6: None Changes in v5: None Changes in v4: None Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/iommu/rockchip,iommu.txt | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt index 2098f7732264..6ecefea1c6f9 100644 --- a/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt +++ b/Documentation/devicetree/bindings/iommu/rockchip,iommu.txt @@ -14,6 +14,11 @@ Required properties: "single-master" device, and needs no additional information to associate with its master device. See: Documentation/devicetree/bindings/iommu/iommu.txt +- clocks : A list of clocks required for the IOMMU to be accessible by + the host CPU. +- clock-names : Should contain the following: + "iface" - Main peripheral bus clock (PCLK/HCL) (required) + "aclk" - AXI bus clock (required) Optional properties: - rockchip,disable-mmu-reset : Don't use the mmu reset operation. @@ -27,5 +32,7 @@ Example: reg = <0xff940300 0x100>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "vopl_mmu"; + clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; + clock-names = "aclk", "iface"; #iommu-cells = <0>; }; -- 2.11.0 ^ permalink raw reply related [flat|nested] 12+ messages in thread
[parent not found: <20180323073814.5802-10-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>]
* Re: [PATCH v8 09/14] dt-bindings: iommu/rockchip: Add clock property [not found] ` <20180323073814.5802-10-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org> @ 2018-03-25 23:52 ` Rob Herring 0 siblings, 0 replies; 12+ messages in thread From: Rob Herring @ 2018-03-25 23:52 UTC (permalink / raw) To: Jeffy Chen Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, jcliang-F7+t8E8rja9g9hUCZPvPmw, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Heiko Stuebner On Fri, Mar 23, 2018 at 03:38:09PM +0800, Jeffy Chen wrote: > Add clock property, since we are going to control clocks in rockchip > iommu driver. > > Signed-off-by: Jeffy Chen <jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org> > Reviewed-by: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> > --- Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v8 00/14] iommu/rockchip: Use OF_IOMMU [not found] ` <20180323073814.5802-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org> 2018-03-23 7:38 ` [PATCH v8 09/14] dt-bindings: iommu/rockchip: Add clock property Jeffy Chen @ 2018-03-29 10:24 ` Joerg Roedel 1 sibling, 0 replies; 12+ messages in thread From: Joerg Roedel @ 2018-03-29 10:24 UTC (permalink / raw) To: Jeffy Chen Cc: Mark Rutland, Heiko Stuebner, Catalin Marinas, Shawn Lin, Will Deacon, Kever Yang, Finley Xiao, Romain Perier, Sugar Zhang, Brian Norris, Russell King, jcliang-F7+t8E8rja9g9hUCZPvPmw, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, Nickey Yang, Jacob Chen, Liang Chen, Caesar Wang, devicetree-u79uwXL29TY76Z2rM5mHXA, Arnd Bergmann, Rob Herring, Mark Yao, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-kernel-u79uwXL29TY76Z2rM5mHXA, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA, David Wu <dav> On Fri, Mar 23, 2018 at 03:38:00PM +0800, Jeffy Chen wrote: > > This series fixes some issues in rockchip iommu driver, and add of_iommu > support in it. > > Changes in v8: > Rebase on newest for-next. > Don't introduce the additional return. > Rename startup()/shutdown() to enable()/disable(). > Do runtime PM suspend in .shutdown(). > Modify pm_runtime_get_if_in_use()/pm_runtime_put() as Tomasz suggested. Applied, thanks. ^ permalink raw reply [flat|nested] 12+ messages in thread
end of thread, other threads:[~2018-04-10 11:46 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-03-23 7:38 [PATCH v8 00/14] iommu/rockchip: Use OF_IOMMU Jeffy Chen
2018-03-23 7:38 ` [PATCH v8 07/14] ARM: dts: rockchip: add clocks in iommu nodes Jeffy Chen
2018-04-09 14:41 ` Tomeu Vizoso
2018-04-09 15:44 ` Heiko Stübner
2018-04-09 15:53 ` Robin Murphy
2018-04-09 15:55 ` Heiko Stübner
2018-04-09 21:49 ` Heiko Stübner
2018-04-10 10:54 ` Heiko Stuebner
2018-04-10 11:46 ` Heiko Stuebner
[not found] ` <20180323073814.5802-1-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2018-03-23 7:38 ` [PATCH v8 09/14] dt-bindings: iommu/rockchip: Add clock property Jeffy Chen
[not found] ` <20180323073814.5802-10-jeffy.chen-TNX95d0MmH7DzftRWevZcw@public.gmane.org>
2018-03-25 23:52 ` Rob Herring
2018-03-29 10:24 ` [PATCH v8 00/14] iommu/rockchip: Use OF_IOMMU Joerg Roedel
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for NNTP newsgroup(s).